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Travelled to:
1 × USA
Collaborated with:
Y.Choi J.Kim
Talks about:
variabl (1) discret (1) circuit (1) analog (1) optim (1) awar (1)

Person: Seobin Jung

DBLP DBLP: Jung:Seobin

Contributed to:

DAC 20122012

Wrote 1 papers:

DAC-2012-JungCK #optimisation #variability
Variability-aware, discrete optimization for analog circuits (SJ, YC, JK), pp. 536–541.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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