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Travelled to:
1 × USA
Collaborated with:
K.Fukunaga H.S.Stone T.Kasai
Talks about:
placement (1) approach (1) circuit (1) space (1) modul (1) graph (1) use (1)

Person: Shoichiro Yamada

DBLP DBLP: Yamada:Shoichiro

Contributed to:

DAC 19831983

Wrote 1 papers:

DAC-1983-FukunagaYSK #approach #graph #using
Placement of circuit modules using a graph space approach (KF, SY, HSS, TK), pp. 465–471.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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