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Travelled to:
1 × USA
Collaborated with:
E.Tamura K.Ogawa
Talks about:
hierarch (1) analysi (1) system (1) layout (1) delay (1) build (1) block (1) path (1)

Person: Toshio Nakano

DBLP DBLP: Nakano:Toshio

Contributed to:

DAC 19831983

Wrote 1 papers:

DAC-1983-TamuraON #analysis #layout
Path delay analysis for hierarchical building block layout system (ET, KO, TN), pp. 403–410.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.