Travelled to:
2 × USA
Collaborated with:
R.Kamikawai M.Yamada K.Furumaya Y.Tsuchiya K.Kishida A.Osawa I.Yasuda
Talks about:
placement (1) program (1) system (1) master (1) critic (1) slice (1) delay (1) check (1) rout (1) path (1)
Person: Tsuneyo Chiba
DBLP: Chiba:Tsuneyo
Contributed to:
Wrote 2 papers:
- DAC-1981-KamikawaiYCFT
- A critical path delay check system (RK, MY, TC, KF, YT), pp. 118–123.
- DAC-1976-KamikawaiKOYC
- Placement and routing program for master-slice LSI’s (RK, KK, AO, IY, TC), pp. 245–250.