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Travelled to:
2 × USA
Collaborated with:
R.Kamikawai M.Yamada K.Furumaya Y.Tsuchiya K.Kishida A.Osawa I.Yasuda
Talks about:
placement (1) program (1) system (1) master (1) critic (1) slice (1) delay (1) check (1) rout (1) path (1)

Person: Tsuneyo Chiba

DBLP DBLP: Chiba:Tsuneyo

Contributed to:

DAC 19811981
DAC 19761976

Wrote 2 papers:

A critical path delay check system (RK, MY, TC, KF, YT), pp. 118–123.
Placement and routing program for master-slice LSI’s (RK, KK, AO, IY, TC), pp. 245–250.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.