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Travelled to:
1 × Hungary
Collaborated with:
P.Baillot K.Terui
Talks about:
system (1) verif (1) reduc (1) ptime (1) logic (1) light (1) affin (1) term (1) dual (1)

Person: Vincent Atassi

DBLP DBLP: Atassi:Vincent

Contributed to:

CSL 20062006

Wrote 1 papers:

CSL-2006-AtassiBT #logic #system f #verification
Verification of Ptime Reducibility for System F Terms Via Dual Light Affine Logic (VA, PB, KT), pp. 150–166.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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