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Travelled to:
1 × Taiwan
Collaborated with:
W.Shu M.Wu
Talks about:
algorithm (1) parallel (1) transit (1) closur (1) fpga (1) base (1)

Person: Zheng Ding

DBLP DBLP: Ding:Zheng

Contributed to:

SAC 20112011

Wrote 1 papers:

SAC-2011-DingSW #algorithm #parallel #transitive
FPGA based parallel transitive closure algorithm (ZD, WS, MYW), pp. 393–394.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.