BibSLEIGH corpus
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Used together with:
map (8)
loop (5)
base (3)
architectur (2)
memori (2)

Stem cgras$ (all stems)

9 papers:

Path selection based acceleration of conditionals in CGRAs (SR, AS, MH), pp. 121–126.
DATEDATE-2015-YinLLWG #pipes and filters
Joint affine transformation and loop pipelining for mapping nested loop on CGRAs (SY, DL, LL, SW, YG), pp. 115–120.
Branch-Aware Loop Mapping on CGRAs (MH, AS, SBKV), p. 6.
DACDAC-2013-HamzehSV #architecture #configuration management #named
REGIMap: register-aware application mapping on coarse-grained reconfigurable architectures (CGRAs) (MH, AS, SBKV), p. 10.
DACDAC-2013-LiuYLW #modelling #optimisation
Polyhedral model based mapping optimization of loop nests for CGRAs (DL, SY, LL, SW), p. 8.
DATEDATE-2013-HanCL #compilation
Compiling control-intensive loops for CGRAs with state-based full predication (KH, KC, JL), pp. 1579–1582.
DATEDATE-2013-LeeJS #architecture #hybrid #memory management #performance
Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs (JL, YJ, SS), pp. 1575–1578.
DACDAC-2012-HamzehSV #morphism #named #using
EPIMap: using epimorphism to map applications on CGRAs (MH, AS, SBKV), pp. 1284–1291.
LCTESLCTES-2010-KimLSP #memory management #multi
Operation and data mapping for CGRAs with multi-bank memory (YK, JL, AS, YP), pp. 17–26.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.