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Used together with:
cach (2)
refresh (2)
low (2)
energi (2)
structur (1)

Stem edram$ (all stems)

4 papers:

DATEDATE-2015-PorembaMLVX #3d #modelling #named
DESTINY: a tool for modeling emerging 3D NVM and eDRAM caches (MP, SM, DL, JSV, YX), pp. 1543–1546.
HPCAHPCA-2014-AgrawalAT #energy #locality #named #process
Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules (AA, AA, JT), pp. 84–95.
HPCAHPCA-2013-ChangRLJ #comparison #energy #scalability
Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM (MTC, PR, SLL, BJ), pp. 143–154.
DATEDATE-2005-LopezPN #embedded #metric
A New Embedded Measurement Structure for eDRAM Capacitor (LL, JMP, DN), pp. 462–463.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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