4 papers:
DATE-2015-PorembaMLVX #3d #modelling #named- DESTINY: a tool for modeling emerging 3D NVM and eDRAM caches (MP, SM, DL, JSV, YX), pp. 1543–1546.
HPCA-2014-AgrawalAT #energy #locality #named #process- Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules (AA, AA, JT), pp. 84–95.
- HPCA-2013-ChangRLJ #comparison #energy #scalability
- Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM (MTC, PR, SLL, BJ), pp. 143–154.
- DATE-2005-LopezPN #embedded #metric
- A New Embedded Measurement Structure for eDRAM Capacitor (LL, JMP, DN), pp. 462–463.
