19 papers:
- SAC-2015-LeeKKE #algorithm #architecture #hybrid #memory management #named
- M-CLOCK: migration-optimized page replacement algorithm for hybrid DRAM and PCM memory architecture (ML, DK, JK, YIE), pp. 2001–2006.
- ASPLOS-2015-WangJZY #memory management #named #reliability
- SD-PCM: Constructing Reliable Super Dense Phase Change Memory under Write Disturbance (RW, LJ, YZ, JY), pp. 19–31.
- LCTES-2015-LiuY #encryption #framework #in memory #memory management
- Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory (CL, CY), p. 10.
- DAC-2014-AsadiniaAS #named #on-demand
- OD3P: On-Demand Page Paired PCM (MA, MA, HSA), p. 6.
- DAC-2014-KuanCHL #database #embedded #multi
- Space-Efficient Multiversion Index Scheme for PCM-based Embedded Database Systems (YHK, YHC, PCH, KyL), p. 6.
- DAC-2014-QiuLX #performance #power management
- Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM (KQ, QL, CJX), p. 6.
- DAC-2014-ZhaoJZX #process
- SLC-enabled Wear Leveling for MLC PCM Considering Process Variation (MZ, LJ, YZ, CJX), p. 6.
- DATE-2014-AhariAKT #architecture #configuration management #power management #using
- A power-efficient reconfigurable architecture using PCM configuration technology (AA, HA, BK, MBT), pp. 1–6.
- DATE-2014-LiHCXJX #embedded #memory management #stack
- A wear-leveling-aware dynamic stack for PCM memory in embedded systems (QL, YH, YC, CJX, NJ, CX), pp. 1–4.
- DATE-2014-LiSH0 #in memory #memory management #named
- Partial-SET: Write speedup of PCM main memory (BL, SS, YH, XL), pp. 1–4.
- SAC-2014-MoonPPS #recognition
- Improved named entity recognition: patterns in columns model (PCM) (CYM, MP, HyP, JS), pp. 927–928.
- DATE-2013-HuZXTS #embedded #hybrid #in memory #memory management
- Software enabled wear-leveling for hybrid PCM main memory on embedded systems (JH, QZ, CJX, WCT, EHMS), pp. 599–602.
- HPCA-2013-YueZ #symmetry
- Accelerating write by exploiting PCM asymmetries (JY, YZ), pp. 282–293.
- LCTES-2013-LiJZHX #compilation #performance #power management
- Compiler directed write-mode selection for high performance low power volatile PCM (QL, LJ, YZ, YH, CJX), pp. 101–110.
- DAC-2012-ChenHKYW #low cost
- Age-based PCM wear leveling with nearly zero search cost (CHC, PCH, TWK, CLY, CYMW), pp. 453–458.
- DATE-2012-LiuWWQS #embedded #memory management #process
- A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems (DL, TW, YW, ZQ, ZS), pp. 1447–1450.
- CIKM-2011-GaoXHCH #named #transaction
- PCMLogging: reducing transaction logging overhead with PCM (SG, JX, BH, BC, HH), pp. 2401–2404.
- HPCA-2011-QureshiSLF #detection #online
- Practical and secure PCM systems by online detection of malicious write streams (MKQ, AS, LL, MF), pp. 478–489.
- DATE-2010-FerreiraZBCMM #in memory #memory management
- Increasing PCM main memory lifetime (APF, MZ, SB, BRC, RGM, DM), pp. 914–919.