Efficient Testing of Clock Regenerator Circuits in Scan Designs
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Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh
Efficient Testing of Clock Regenerator Circuits in Scan Designs
DAC, 1997.

DAC 1997
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@inproceedings{DAC-1997-RainaBNMB,
	author        = "Rajesh Raina and Robert Bailey and Charles Njinda and Robert F. Molyneaux and Charlie Beh",
	booktitle     = "{Proceedings of the 34th Design Automation Conference}",
	doi           = "10.1145/266021.266042",
	isbn          = "0-89791-920-3",
	pages         = "95--100",
	publisher     = "{ACM Press}",
	title         = "{Efficient Testing of Clock Regenerator Circuits in Scan Designs}",
	year          = 1997,
}

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