Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips
DAC, 2009.
@inproceedings{DAC-2009-ChouCWCCWW,
author = "Shu-Hsuan Chou and Chien-Chih Chen and Chi-Neng Wen and Yi-Chao Chan and Tien-Fu Chen and Chao-Ching Wang and Jinn-Shyan Wang",
booktitle = "{Proceedings of the 46th Design Automation Conference}",
doi = "10.1145/1629911.1630062",
isbn = "978-1-60558-497-3",
pages = "587--592",
publisher = "{ACM}",
title = "{No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips}",
year = 2009,
}