Instruction trace compression for rapid instruction cache simulation
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Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jörg Henkel
Instruction trace compression for rapid instruction cache simulation
DATE, 2007.

DATE 2007
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@inproceedings{DATE-2007-JanapsatyaIPH,
	author        = "Andhi Janapsatya and Aleksandar Ignjatovic and Sri Parameswaran and Jörg Henkel",
	booktitle     = "{Proceedings of the 11th Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/1266366.1266538",
	isbn          = "978-3-9810801-2-4",
	pages         = "803--808",
	publisher     = "{ACM}",
	title         = "{Instruction trace compression for rapid instruction cache simulation}",
	year          = 2007,
}

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