A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core
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Andreas Wortmann, Sven Simon, Matthias Müller
A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core
DATE, 2004.

DATE DF 2004
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@inproceedings{DATE-DF-2004-WortmannSM,
	author        = "Andreas Wortmann and Sven Simon and Matthias Müller",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Designers’ Forum}",
	doi           = "10.1109/DATE.2004.1269197",
	isbn          = "0-7695-2085-5",
	pages         = "46--51",
	publisher     = "{IEEE Computer Society}",
	title         = "{A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core}",
	year          = 2004,
}

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