Nilanjan Banerjee, Praveen Vellanki, Karam S. Chatha
A Power and Performance Model for Network-on-Chip Architectures
DATE, 2004.
@inproceedings{DATE-v2-2004-BanerjeeVC,
author = "Nilanjan Banerjee and Praveen Vellanki and Karam S. Chatha",
booktitle = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 2}",
doi = "10.1109/DATE.2004.1269067",
isbn = "0-7695-2085-5",
pages = "1250--1255",
publisher = "{IEEE Computer Society}",
title = "{A Power and Performance Model for Network-on-Chip Architectures}",
year = 2004,
}