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Travelled to:
1 × France
Collaborated with:
D.Mathaikutty S.K.Shukla S.V.Kodakara D.J.Lilja
Talks about:
microprocessor (1) generat (1) direct (1) design (1) valid (1) fault (1) test (1)

Person: Ajit Dingankar

DBLP DBLP: Dingankar:Ajit

Contributed to:

DATE 20072007

Wrote 1 papers:

DATE-2007-MathaikuttySKLD #design #fault #generative #testing #validation
Design fault directed test generation for microprocessor validation (DM, SKS, SVK, DJL, AD), pp. 761–766.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.