BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
2 × France
3 × Germany
5 × USA
Collaborated with:
J.J.Yi D.M.Hawkins D.C.Ness J.Huang J.Kim S.V.Kodakara Y.Ji F.Ran C.Ma N.Saraf K.Bazargan M.D.Riedel V.Nookala Y.Chen S.S.Sapatnekar D.Mathaikutty S.K.Shukla A.Dingankar R.Sendag S.Patil M.Jang C.Chen D.Lee Z.Ye W.E.Partlo S.A.Campbell T.Cui
Talks about:
statist (3) design (3) use (3) techniqu (2) stochast (2) approach (2) network (2) comput (2) simul (2) logic (2)

Person: David J. Lilja

DBLP DBLP: Lilja:David_J=

Contributed to:

DATE 20152015
DATE 20142014
DATE 20122012
DATE 20082008
DATE 20072007
DAC 20052005
HPCA 20052005
HPCA 20032003
HPCA 19991999
HPDC 19971997

Wrote 10 papers:

DATE-2015-JiRML #hardware #implementation #logic #network #probability #using
A hardware implementation of a radial basis function neural network using stochastic logic (YJ, FR, CM, DJL), pp. 880–883.
DATE-2014-SarafBLR #probability #using
IIR filters using stochastic arithmetic (NS, KB, DJL, MDR), pp. 1–6.
DATE-2012-PatilJCLYPLCC #logic
Weighted area technique for electromechanically enabled logic computation with cantilever-based NEMS switches (SP, MWJ, CLC, DL, ZY, WEP, DJL, SAC, TC), pp. 727–732.
DATE-2008-NessL #design #fault tolerance #statistics
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods (DCN, DJL), pp. 348–353.
DATE-2007-MathaikuttySKLD #design #fault #generative #testing #validation
Design fault directed test generation for microprocessor validation (DM, SKS, SVK, DJL, AD), pp. 761–766.
DAC-2005-NookalaCLS #approach #architecture #design #statistics #using
Microarchitecture-aware floorplanning using a statistical design of experiments approach (VN, YC, DJL, SSS), pp. 579–584.
HPCA-2005-YiKSLH #simulation
Characterizing and Comparing Prevailing Simulation Techniques (JJY, SVK, RS, DJL, DMH), pp. 266–277.
HPCA-2003-YiLH #approach #simulation #statistics
A Statistically Rigorous Approach for Improving Simulation Methodology (JJY, DJL, DMH), pp. 281–291.
HPCA-1999-HuangL #locality #reuse
Exploiting Basic Block Value Locality with Block Reuse (JH, DJL), pp. 106–114.
HPDC-1997-KimL #distributed #network #parallel
Utilizing Heterogeneous Networks in Distributed Parallel Computing Systems (JK, DJL), pp. 336–345.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.