BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × USA
Collaborated with:
V.Rana F.Bruschi D.Sciuto I.Beretta D.Atienza
Talks about:
implement (1) algorithm (1) synthesi (1) stencil (1) level (1) devic (1) loop (1) iter (1) high (1) fpga (1)

Person: Alessandro Antonio Nacci

DBLP DBLP: Nacci:Alessandro_Antonio

Contributed to:

DAC 20132013

Wrote 1 papers:

DAC-2013-NacciRBSBA #algorithm #implementation #synthesis
A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices (AAN, VR, FB, DS, IB, DA), p. 6.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.