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Travelled to:
1 × France
1 × USA
Collaborated with:
H.Pedram H.Huang P.Bhalerao P.A.Beerel
Talks about:
asynchron (2) circuit (2) framework (1) commerci (1) abstract (1) verilog (1) suitabl (1) equival (1) describ (1) power (1)

Person: Arash Saifhashemi

DBLP DBLP: Saifhashemi:Arash

Contributed to:

DATE 20152015
DAC 20032003

Wrote 2 papers:

DATE-2015-SaifhashemiHBB #equivalence #logic #tool support #using
Logical equivalence checking of asynchronous circuits using commercial tools (AS, HHH, PB, PAB), pp. 1563–1566.
DAC-2003-SaifhashemiP #abstraction #framework #modelling
Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction (AS, HP), pp. 330–333.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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