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Travelled to:
1 × USA
Collaborated with:
K.Gala V.Zolotov R.Panda J.Wang D.Blaauw
Talks about:
analysi (1) induct (1) model (1) chip (1)

Person: Brian Young

DBLP DBLP: Young:Brian

Contributed to:

DAC 20002000

Wrote 1 papers:

DAC-2000-GalaZPYWB #analysis #modelling
On-chip inductance modeling and analysis (KG, VZ, RP, BY, JW, DB), pp. 63–68.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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