Travelled to:1 × France
Collaborated with:A.Lu H.Lu E.Jang Y.Lin C.Chuang R.Lin
Talks about:transistor (1) placement (1) standard (1) simultan (1) pair (1) cmos (1) cell (1)
Person: Chun-Hsiang Hung
DBLP: Hung:Chun=Hsiang
Contributed to:
2015Wrote 1 papers:
- DATE-2015-LuLJLHCL #standard
- Simultaneous transistor pairing and placement for CMOS standard cells (AL, HJL, EJJ, YPL, CHH, CCC, RBL), pp. 1647–1652.