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Travelled to:
5 × USA
Collaborated with:
D.Kim M.Zhao X.Li A.Agarwal S.Liao P.H.Wang J.d.Cuvillo X.Tian X.Zou H.Wang M.Girkar J.P.Shen
Talks about:
processor (2) thread (2) impact (2) experiment (1) precondit (1) directori (1) algorithm (1) techniqu (1) synchron (1) prefetch (1)

Person: Donald Yeung

DBLP DBLP: Yeung:Donald

Contributed to:

HPCA 20152015
HPCA 20072007
CGO 20042004
ASPLOS 20022002
PPoPP 19931993

Wrote 5 papers:

HPCA-2015-ZhaoY #analysis #distance #manycore #reuse #scalability
Studying the impact of multicore processor scaling on directory techniques via reuse distance analysis (MZ, DY), pp. 590–602.
HPCA-2007-LiY #correctness #fault tolerance
Application-Level Correctness and its Impact on Fault Tolerance (XL, DY), pp. 181–192.
CGO-2004-KimLWCTZWYGS #physics #thread
Physical Experimentation with Prefetching Helper Threads on Intel’s Hyper-Threaded Processors (DK, SWL, PHW, JdC, XT, XZ, HW, DY, MG, JPS), pp. 27–38.
ASPLOS-2002-KimY #algorithm #compilation #design #evaluation
Design and evaluation of compiler algorithms for pre-execution (DK, DY), pp. 159–170.
PPoPP-1993-YeungA #experience
Experience with Fine-Grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient (DY, AA), pp. 187–197.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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