BibSLEIGH — Proceedings of the 21st International Symposium on High-Performance Computer Architecture

Proceedings of the 21st International Symposium on High-Performance Computer Architecture
HPCA, 2015.

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@proceedings{HPCA-2015,
	address       = "Burlingame, California, USA",
	isbn          = "978-1-4799-8930-0",
	publisher     = "{IEEE}",
	title         = "{Proceedings of the 21st International Symposium on High-Performance Computer Architecture}",
	year          = 2015,
}

Contents (55 items)

HPCA-2015-ChandramoorthyT #architecture: Exploring architectural heterogeneity in intelligent vision systems (NC, GT, KMI, AP, SA, SAH, MC, JS, VN, LB), pp. 1–12.
HPCA-2015-PeraisS #effectiveness #framework #named #predict: BeBoP: A cost effective predictor infrastructure for superscalar value prediction (AP, AS), pp. 13–25.
HPCA-2015-HayesPUCV #algorithm #architecture #novel #sorting: VSR sort: A novel vectorised sorting algorithm & architecture extensions for future microprocessors (TH, OP, OSÜ, AC, MV), pp. 26–38.
HPCA-2015-JimenezBBOCV #manycore #performance: Increasing multicore system efficiency through intelligent bandwidth shifting (VJ, AB, PB, FPO, FJC, MV), pp. 39–50.
HPCA-2015-PekhimenkoHCMGK #reuse: Exploiting compressed block size as an indicator of future reuse (GP, TH, RC, OM, PBG, MAK, TCM), pp. 51–63.
HPCA-2015-BeckmannS #named #performance: Talus: A simple way to remove cliffs in cache performance (NB, DS), pp. 64–75.
HPCA-2015-XieLWSW #coordination: Coordinated static and dynamic cache bypassing for GPUs (XX, YL, YW, GS, TW), pp. 76–88.
HPCA-2015-LiRJOEBFR #throughput: Priority-based cache allocation in throughput processors (DL, MR, DRJ, MO, ME, DB, DSF, SWR), pp. 89–100.
HPCA-2015-KimSE #flexibility #memory management #reliability: Bamboo ECC: Strong, safe, and flexible codes for reliable computer memory (JK, MS, ME), pp. 101–112.
HPCA-2015-WangM #approach #architecture #manycore #named #resource management #scalability: XChange: A market-based approach to scalable dynamic multi-resource allocation in multicore architectures (XW, JFM), pp. 113–125.
HPCA-2015-MeswaniBRSIL #approach #architecture #memory management: Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories (MRM, SB, DR, JS, MI, GHL), pp. 126–136.
HPCA-2015-ZhuHR #energy #mobile #scheduling #web: Event-based scheduling for energy-efficient QoS (eQoS) in mobile Web applications (YZ, MH, VJR), pp. 137–149.
HPCA-2015-NachiappanYSSKI #energy #knowledge base: Domain knowledge based energy management in handhelds (NCN, PY, NS, AS, MTK, RI, CRD), pp. 150–160.
HPCA-2015-LengZR #architecture #gpu: GPU voltage noise: Characterization and hierarchical smoothing of spatial and temporal voltage noise interference in GPU architectures (JL, YZ, VJR), pp. 161–173.
HPCA-2015-SethiaJM #gpu #memory management #named: Mascar: Speeding up GPU warps by reducing memory pitstops (AS, DAJ, SAM), pp. 174–185.
HPCA-2015-RosDK #classification #clustering #performance: Hierarchical private/shared classification: The key to simple and efficient coherence for clustered cache hierarchies (AR, MD, SK), pp. 186–197.
HPCA-2015-MenezoPG #energy #hybrid #performance #protocol #scalability: Flask coherence: A morphable hybrid coherence protocol to balance energy, performance and scalability (LGM, VP, JÁG), pp. 198–209.
HPCA-2015-PapadopoulouTSM #design #predict: Prediction-based superpage-friendly TLB designs (MMP, XT, AS, AM), pp. 210–222.
HPCA-2015-DuZCMM #memory management #physics: Supporting superpages in non-contiguous physical memory (YD, MZ, BRC, DM, RGM), pp. 223–234.
HPCA-2015-IslamMRW #low cost: Paying to save: Reducing cost of colocation data center via rewards (MAI, AHM, SR, XW), pp. 235–245.
HPCA-2015-PetrucciLDZMMT #multi #named: Octopus-Man: QoS-driven task management for heterogeneous multicores in warehouse-scale computers (VP, MAL, JD, YZ, DM, JM, LT), pp. 246–258.
HPCA-2015-LiuLJCT #comprehension #empirical: Understanding the virtualization “Tax” of scale-out pass-through GPUs in GaaS clouds: An empirical study (ML, TL, NJ, AC, VT), pp. 259–270.
HPCA-2015-HsuZLMWMTD #named #query: Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting (CHH, YZ, MAL, DM, TFW, JM, LT, RGD), pp. 271–282.
HPCA-2015-FarahaniAMK #architecture #memory management #named #standard: NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules (AFF, JHA, KM, NSK), pp. 283–295.
HPCA-2015-WangPBAK #alloy #architecture #memory management #named: Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems (HW, CJP, GB, JHA, NSK), pp. 296–308.
HPCA-2015-NairCRQ #latency #memory management: Reducing read latency of phase change memory via early read and Turbo Read (PJN, CCC, BR, MKQ), pp. 309–319.
HPCA-2015-MaddahSM #named #optimisation #symmetry: CAFO: Cost aware flip optimization for asymmetric memories (RM, SMS, RGM), pp. 320–330.
HPCA-2015-TiwariGRMRVOLDN #comprehension #design #fault #gpu #scalability: Understanding GPU errors on large-scale HPC systems and the implications for system design and operation (DT, SG, JHR, DM, PR, SSV, DAGdO, DL, ND, POAN, LC, ASB), pp. 331–342.
HPCA-2015-JaleelNMSE #latency: High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches (AJ, JN, AM, SCSJ, JSE), pp. 343–353.
HPCA-2015-AgarwalNOKW: Unlocking bandwidth for GPUs in CC-NUMA systems (NA, DWN, MO, SWK, TFW), pp. 354–365.
HPCA-2015-AroraMPJT #behaviour #benchmark #comprehension #cpu #gpu #metric #power management: Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems (MA, SM, IP, NJ, DMT), pp. 366–377.
HPCA-2015-ChenZPP #towards: Power punch: Towards non-blocking power-gating of NoC routers (LC, DZ, MP, TMP), pp. 378–389.
HPCA-2015-FujiwaraKOMC #network: Augmenting low-latency HPC network with free-space optical links (IF, MK, TO, HM, HC), pp. 390–401.
HPCA-2015-ChrysosMRBV #named #network: SCOC: High-radix switches made of bufferless clos networks (NC, CM, MR, CB, BV), pp. 402–414.
HPCA-2015-WonKKJPS #network #scalability: Overcoming far-end congestion in large-scale networks (JW, GK, JK, TJ, MP, SS), pp. 415–427.
HPCA-2015-PalframanKL #energy #fault #named #performance: iPatch: Intelligent fault patching to improve energy efficiency (DJP, NSK, MHL), pp. 428–438.
HPCA-2015-KimE #performance #reliability #trade-off: Balancing reliability, cost, and performance tradeoffs with FreeFault (DWK, ME), pp. 439–450.
HPCA-2015-JinPSCSZ #fault #hardware #named: FTXen: Making hypervisor resilient to hardware faults on relaxed cores (XJ, SP, TS, RC, ZS, YZ), pp. 451–462.
HPCA-2015-DuweJ0 #fault #latency #predict: Correction prediction: Reducing error correction latency for on-chip memories (HD, XJ, RK), pp. 463–475.
HPCA-2015-XuNMBZY0 #architecture #challenge #memory management: Overcoming the challenges of crossbar resistive memory architectures (CX, DN, NM, RB, TZ, SY, YX), pp. 476–488.
HPCA-2015-LeeKPKSCM #adaptation #optimisation: Adaptive-latency DRAM: Optimizing DRAM timing for the common-case (DL, YK, GP, SMK, VS, KKWC, OM), pp. 489–501.
HPCA-2015-SonLSKKA #architecture #named: CiDRA: A cache-inspired DRAM resilience architecture (YHS, SL, OS, SK, NSK, JHA), pp. 502–513.
HPCA-2015-FraneyL: Tag tables (SF, MHL), pp. 514–525.
HPCA-2015-MaZLSLLS0N #architecture #energy: Architecture exploration for ambient energy harvesting nonvolatile processors (KM, YZ, SL, KS, XL, YL, JS, YX, VN), pp. 526–537.
HPCA-2015-BeckmannTS #distributed #scalability: Scaling distributed cache hierarchies through computation and data co-scheduling (NB, PAT, DS), pp. 538–550.
HPCA-2015-CaiLHMM #memory management #optimisation: Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (YC, YL, EFH, KM, OM), pp. 551–563.
HPCA-2015-WuGLJC #estimation #machine learning #performance #using: GPGPU performance and power estimation using machine learning (GYW, JLG, AL, NJ, DC), pp. 564–576.
HPCA-2015-XiJBWB #architecture #fault: Quantifying sources of error in McPAT and potential impacts on architectural studies (SLX, HMJ, PB, GYW, DMB), pp. 577–589.
HPCA-2015-ZhaoY #analysis #distance #manycore #reuse #scalability: Studying the impact of multicore processor scaling on directory techniques via reuse distance analysis (MZ, DY), pp. 590–602.
HPCA-2015-MoreauWNSECO #approximate #named #programmable: SNNAP: Approximate computing on programmable SoCs via neural acceleration (TM, MW, JN, AS, HE, LC, MO), pp. 603–614.
HPCA-2015-GrigorianFR #approximate #named #reliability: BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing (BG, NF, GR), pp. 615–626.
HPCA-2015-NeuwirthFNB #architecture #communication #scalability: Scalable communication architecture for network-attached accelerators (SN, DF, MN, UB), pp. 627–638.
HPCA-2015-HungerKRDVT #comprehension #using: Understanding contention-based channels and using them for defense (CH, MK, ASR, AGD, SV, MT), pp. 639–650.
HPCA-2015-OzsoyDGAP #detection #framework #online #performance: Malware-aware processors: A framework for efficient online malware detection (MO, CD, IG, NBAG, DVP), pp. 651–661.
HPCA-2015-LoCIS #monitoring #runtime #using: Run-time monitoring with adjustable overhead using dataflow-guided filtering (DL, TC, MI, GES), pp. 662–674.

Proceedings of the 21st International Symposium on High-Performance Computer ArchitectureHPCA, 2015.

Contents (55 items)

Proceedings of the 21st International Symposium on High-Performance Computer Architecture
HPCA, 2015.