BibSLEIGH
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Travelled to:
1 × France
Collaborated with:
C.A.L.Lisbôa L.Carro
Talks about:
architectur (1) technolog (1) processor (1) effici (1) futur (1) core (1) ser (1) low (1)

Person: Eduardo Luis Rhod

DBLP DBLP: Rhod:Eduardo_Luis

Contributed to:

DATE 20072007

Wrote 1 papers:

DATE-2007-RhodLC #architecture #performance
A low-SER efficient core processor architecture for future technologies (ELR, CALL, LC), pp. 1448–1453.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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