BibSLEIGH corpus
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Travelled to:
1 × China
1 × France
1 × USA
Collaborated with:
J.Renau F.J.Mesa-Martinez H.Safizadeh M.Tahghighi G.Tavasoli K.Bazargan
Talks about:
use (2) uncertainti (1) processor (1) character (1) multicor (1) behavior (1) thermal (1) circuit (1) random (1) simul (1)

Person: Ehsan K. Ardestani

DBLP DBLP: Ardestani:Ehsan_K=

Contributed to:

HPCA 20132013
ASPLOS 20102010
DATE 20092009

Wrote 3 papers:

HPCA-2013-ArdestaniR #manycore #named #performance #using
ESESC: A fast multicore simulator using Time-Based Sampling (EKA, JR), pp. 448–459.
ASPLOS-2010-Mesa-MartinezAR #behaviour
Characterizing processor thermal behavior (FJMM, EKA, JR), pp. 193–204.
DATE-2009-SafizadehTATB #nondeterminism #using
Using randomization to cope with circuit uncertainty (HS, MT, EKA, GT, KB), pp. 815–820.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.