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Travelled to:
1 × Germany
1 × USA
Collaborated with:
R.Damasevicius V.Stuikys G.Ziberkas
Talks about:
design (2) approach (1) pattern (1) hardwar (1) generic (1) develop (1) compon (1) applic (1) vhdl (1) two (1)

Person: Giedrius Majauskas

DBLP DBLP: Majauskas:Giedrius

Contributed to:

DAC 20032003
DATE 20012001

Wrote 2 papers:

DAC-2003-DamaseviciusMS #design pattern #hardware
Application of design patterns for hardware design (RD, GM, VS), pp. 48–53.
DATE-2001-StuikysZDM #component
Two approaches for developing generic components in VHDL (VS, GZ, RD, GM), p. 800.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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