BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
2 × USA
2 × United Kingdom
Collaborated with:
S.Kumar P.Ancilotti M.D.Natale L.Carnevali A.Pinzuti E.Vicario P.Gai M.Trimarchi G.Guidi S.Mazzini M.D'Alessandro A.Domenici T.Vardanega L.Palopoli L.Abeni F.Conticelli P.Pagano M.Chitnis A.Romano R.Severino M.Alves P.G.Sousa E.Tovar
Talks about:
system (3) hierarch (2) network (2) time (2) real (2) base (2) uml (2) hrt (2) processor (1) implement (1)

Person: Giuseppe Lipari

DBLP DBLP: Lipari:Giuseppe

Contributed to:

PDP 20142014
Ada-Europe 20112011
SAC 20092009
CBSE 20042004
Ada-Europe 20032003
LCTES/OM 20012001

Wrote 6 papers:

PDP-2014-KumarL #analysis #latency #manycore
Latency Analysis of Network-on-Chip Based Many-Core Processors (SK, GL), pp. 432–439.
AdaEurope-2011-CarnevaliLPV #approach #design #formal method #scheduling #verification
A Formal Approach to Design and Verification of Two-Level Hierarchical Scheduling Systems (LC, GL, AP, EV), pp. 118–131.
SAC-2009-PaganoCRLSAST #implementation #network #realtime
ERIKA and open-ZB: an implementation for real-time wireless networking (PP, MC, AR, GL, RS, MA, PGS, ET), pp. 1687–1688.
CBSE-2004-LipariGTGA #component #framework #realtime
A Hierarchical Framework for Component-Based Real-Time Systems (GL, PG, MT, GG, PA), pp. 209–216.
AdaEurope-2003-MazziniDNDLV #named #uml
HRT-UML: Taking HRT-HOOD onto UML (SM, MD, MDN, AD, GL, TV), pp. 405–416.
LCTES-OM-2001-PalopoliLANAC #embedded #performance #prototype #simulation
A Tool for Simulation and Fast Prototyping of Embedded Control Systems (LP, GL, LA, MDN, PA, FC), pp. 73–81.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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