Travelled to:
2 × Germany
Collaborated with:
S.Wang T.Jin C.Zheng
Talks about:
volatil (1) lifetim (1) exploit (1) regist (1) narrow (1) improv (1) design (1) balanc (1) width (1) power (1)
Person: Guangshan Duan
DBLP: Duan:Guangshan
Contributed to:
Wrote 2 papers:
- DATE-2014-DuanW
- Exploiting narrow-width values for improving non-volatile cache lifetime (GD, SW), pp. 1–4.
- DATE-2012-WangJZD #design #power management
- Low power aging-aware register file design by duty cycle balancing (SW, TJ, CZ, GD), pp. 546–549.