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Travelled to:
2 × USA
Collaborated with:
M.D.F.Wong I.Liu
Talks about:
voltag (3) assign (2) placement (1) increment (1) constrain (1) outlier (1) island (1) improv (1) detect (1) time (1)

Person: Huaizhi Wu

DBLP DBLP: Wu:Huaizhi

Contributed to:

DAC 20072007
DAC 20062006

Wrote 2 papers:

DAC-2007-WuW #detection #incremental
Improving Voltage Assignment by Outlier Detection and Incremental Placement (HW, MDFW), pp. 459–464.
DAC-2006-WuWL
Timing-constrained and voltage-island-aware voltage assignment (HW, MDFW, IML), pp. 429–432.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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