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Travelled to:
1 × USA
Collaborated with:
Talks about:
multiprocessor (1) implement (1) circuit (1) electr (1) simul (1) relax (1) base (1)

Person: Jeffrey T. Deutsch

DBLP DBLP: Deutsch:Jeffrey_T=

Contributed to:

DAC 19841984

Wrote 1 papers:

DAC-1984-DeutschN #implementation #multi #simulation
A multiprocessor implementation of relaxation-based electrical circuit simulation (JTD, ARN), pp. 350–357.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.