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Travelled to:
1 × USA
Collaborated with:
C.Liu T.Song J.Kim J.Kim S.K.Lim
Talks about:
tsv (2) analysi (1) optim (1) coupl (1) full (1) chip (1)

Person: Jonghyun Cho

DBLP DBLP: Cho:Jonghyun

Contributed to:

DAC 20112011

Wrote 1 papers:

DAC-2011-LiuSCKKL #3d #analysis #optimisation
Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC (CL, TS, JC, JK, JK, SKL), pp. 783–788.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.