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Travelled to:
1 × USA
3 × France
Collaborated with:
V.D.Agrawal P.Y.K.Cheung M.Abramovici D.G.Saab F.M.Gonçalves J.P.Teixeira T.W.Williams
Talks about:
defect (2) model (2) level (2) use (2) interconnect (1) reconfigur (1) parallel (1) diagnosi (1) scalabl (1) satisfi (1)

Person: José T. de Sousa

DBLP DBLP: Sousa:Jos=eacute=_T=_de

Contributed to:

DATE 20002000
DAC 19991999
ED&TC 19971997
EDAC-ETC-EUROASIC 19941994

Wrote 4 papers:

DATE-2000-SousaA #clustering #complexity #fault #modelling #using
Reducing the Complexity of Defect Level Modeling Using the Clustering Effect (JTdS, VDA), pp. 640–644.
DAC-1999-AbramoviciSS #configuration management #hardware #satisfiability #using
A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware (MA, JTdS, DGS), pp. 684–690.
EDTC-1997-SousaC
Improved diagnosis of realistic interconnect shorts (JTdS, PYKC), pp. 501–505.
EDAC-1994-SousaGTW #fault #modelling
Fault Modeling and Defect Level Projections in Digital ICs (JTdS, FMG, JPT, TWW), pp. 436–442.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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