BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × USA
Collaborated with:
M.Saitoh K.Iwata A.Nokamura M.Kakegawa H.Hamamura F.Hirose N.Kawato
Talks about:
simul (2) processor (1) system (1) logic (1) use (1)

Person: Junichi Masuda

DBLP DBLP: Masuda:Junichi

Contributed to:

DAC 19881988

Wrote 1 papers:

DAC-1988-SaitohINKMHHK #logic #simulation #using
Logic Simulation System Using Simulation Processor (SP) (MS, KI, AN, MK, JM, HH, FH, NK), pp. 225–230.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.