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Travelled to:
1 × France
3 × USA
Collaborated with:
H.Shiraishi M.Shoji S.Shimogori S.Kowatari H.Nagai M.Saitoh K.Iwata A.Nokamura M.Kakegawa J.Masuda H.Hamamura N.Kawato
Talks about:
simul (5) machin (2) logic (2) processor (1) placement (1) techniqu (1) behavior (1) perform (1) acceler (1) system (1)

Person: Fumiyasu Hirose

DBLP DBLP: Hirose:Fumiyasu

Contributed to:

ED&TC 19971997
DAC 19921992
DAC 19881988
DAC 19801980

Wrote 4 papers:

EDTC-1997-ShojiHSKN #behaviour #simulation
Acceleration of behavioral simulation on simulation specific machines (MS, FH, SS, SK, HN), pp. 373–377.
DAC-1992-Hirose #evaluation #logic #performance #simulation
Performance Evaluation of an Event-Driven Logic Simulation Machine (FH), pp. 428–431.
DAC-1988-SaitohINKMHHK #logic #simulation #using
Logic Simulation System Using Simulation Processor (SP) (MS, KI, AN, MK, JM, HH, FH, NK), pp. 225–230.
DAC-1980-ShiraishiH #performance #slicing
Efficient placement and routing techniques for master slice LSI (HS, FH), pp. 458–464.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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