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Travelled to:
2 × USA
Collaborated with:
L.Pileggi B.P.Das H.E.Sumbul Q.Zhu F.Franchetti
Talks about:
methodolog (1) synthesi (1) reliabl (1) specif (1) memori (1) fabric (1) detect (1) design (1) attack (1) applic (1)

Person: Kaushik Vaidyanathan

DBLP DBLP: Vaidyanathan:Kaushik

Contributed to:

DAC 20152015
DAC 20142014

Wrote 2 papers:

DAC-2015-SumbulVZFP #design #in memory #synthesis
A synthesis methodology for application-specific logic-in-memory designs (HES, KV, QZ, FF, LP), p. 6.
DAC-2014-VaidyanathanDP #detection #reliability #stack #using
Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack (KV, BPD, LP), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.