Travelled to:1 × Italy
1 × South Korea
1 × Spain
2 × USA
Collaborated with:G.Barrett J.Pallister S.J.Hollis C.Blackmore O.Ray H.Field G.Anderson T.Blackmore D.Halliwell P.Barker N.Ramaram U.Liqat S.Kerrison A.Serrano K.Georgiou P.López-García N.Grech M.V.Hermenegildo
Talks about:energi (4) softwar (2) program (2) coverag (2) verif (2) logic (2) embed (2) interlock (1) framework (1) transpar (1)
Person: Kerstin Eder
DBLP: Eder:Kerstin
Contributed to:
2015
2015
2014
2013
2012
2002Wrote 6 papers:
- CGO-2015-PallisterEH #embedded #energy #optimisation #trade-off
- Optimizing the flash-RAM energy trade-off in deeply embedded systems (JP, KE, SJH), pp. 115–124.
- ICLP-J-2015-BlackmoreRE #approach #compilation #effectiveness #embedded #logic programming #predict
- A logic programming approach to predict effective compiler settings for embedded software (CB, OR, KE), pp. 481–494.
- SAC-2014-FieldAE #development #energy #framework #named
- EACOF: a framework for providing energy transparency to enable energy-aware software development (HF, GA, KE), pp. 1194–1199.
- LOPSTR-2013-LiqatKSGLGHE #analysis #energy #modelling #source code
- Energy Consumption Analysis of Programs Based on XMOS ISA-Level Models (UL, SK, AS, KG, PLG, NG, MVH, KE), pp. 72–90.
- IFM-2012-BlackmoreHBER #automation #generative #simulation #verification
- Analysing and Closing Simulation Coverage by Automatic Generation and Verification of Formal Properties from Coverage Reports (TB, DH, PB, KE, NR), pp. 84–98.
- DAC-2002-EderB #logic #performance #pipes and filters #verification
- Achieving maximum performance: a method for the verification of interlocked pipeline control logic (KE, GB), pp. 135–140.