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Travelled to:
2 × USA
Collaborated with:
P.Kapur G.Chandra S.J.Souri K.Banerjee A.Mehrotra
Talks about:
interconnect (1) methodolog (1) perform (1) multipl (1) analysi (1) repeat (1) reduct (1) implic (1) global (1) design (1)

Person: Krishna Saraswat

DBLP DBLP: Saraswat:Krishna

Contributed to:

DAC 20022002
DAC 20002000

Wrote 2 papers:

DAC-2002-KapurCS #estimation #novel #optimisation #reduction #using
Power estimation in global interconnects and its reduction using a novel repeater optimization methodology (PK, GC, KS), pp. 461–466.
DAC-2000-SouriBMS #analysis #design #motivation #multi #performance
Multiple Si layer ICs: motivation, performance analysis, and design implications (SJS, KB, AM, KS), pp. 213–220.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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