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Travelled to:
1 × USA
Collaborated with:
W.Jone C.A.Papachristou
Talks about:
overlay (1) concurr (1) circuit (1) scheme (1) vlsi (1) test (1)

Person: M. Pereira

DBLP DBLP: Pereira:M=

Contributed to:

DAC 19891989

Wrote 1 papers:

DAC-1989-JonePP #concurrent #testing
A Scheme for Overlaying Concurrent Testing of VLSI Circuits (WBJ, CAP, MP), pp. 531–536.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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