Travelled to:1 × France
5 × USA
Collaborated with:C.A.Papachristou C.Fang F.Yuan Q.Xu H.Xu R.Vemuri M.Li Q.Zeng M.Pereira Y.Liu C.Yeh M.Chang S.Chang R.Ye Z.Sun
Talks about:test (4) circuit (3) time (3) generat (2) voltag (2) specul (2) dynam (2) gate (2) pseudoexhaust (1) placement (1)
Person: Wen-Ben Jone
DBLP: Jone:Wen=Ben
Contributed to:
2013
20092006199919931989Wrote 8 papers:
- DAC-2013-YeYSJX #generative
- Post-placement voltage island generation for timing-speculative circuits (RY, FY, ZS, WBJ, QX), p. 6.
- DAC-2013-YuanLJX #on the #testing
- On testing timing-speculative circuits (FY, YL, WBJ, QX), p. 6.
- DATE-2009-XuVJ #runtime
- Selective light Vth hopping (SLITH): Bridging the gap between runtime dynamic and leakage (HX, RV, WBJ), pp. 594–597.
- DAC-2006-LiZJ #concurrent #named #network #proximity
- DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip (ML, QAZ, WBJ), pp. 849–852.
- DAC-1999-YehCCJ #design
- Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications (CWY, MCC, SCC, WBJ), pp. 68–71.
- DAC-1993-JoneF #identification #optimisation
- Timing Optimization By Gate Resizing And Critical Path Identification (WBJ, CLF), pp. 135–140.
- DAC-1989-JoneP #approach #clustering #coordination #generative #pseudo #testing
- A Coordinated Approach to Partitioning and Test Pattern Generation for Pseudoexhaustive Testing (WBJ, CAP), pp. 525–534.
- DAC-1989-JonePP #concurrent #testing
- A Scheme for Overlaying Concurrent Testing of VLSI Circuits (WBJ, CAP, MP), pp. 531–536.