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Travelled to:
1 × USA
Collaborated with:
A.Rajendiran S.Ananthanarayanan H.D.Patel S.Garg
Talks about:
processor (1) instruct (1) reliabl (1) comput (1) ultra (1) reduc (1) set (1)

Person: Mahesh V. Tripunitara

DBLP DBLP: Tripunitara:Mahesh_V=

Contributed to:

DAC 20122012

Wrote 1 papers:

DAC-2012-RajendiranAPTG #reliability #set
Reliable computing with ultra-reduced instruction set co-processors (AR, SA, HDP, MVT, SG), pp. 697–702.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.