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low (53)
power (44)
design (24)
system (14)
use (12)

Stem ultra$ (all stems)

93 papers:

DATEDATE-2015-0001B #clustering #energy #manycore #performance
A ultra-low-energy convolution engine for fast brain-inspired vision in multicore clusters (FC, LB), pp. 683–688.
DATEDATE-2015-AmirhosseinRBCM #power management
An all-digital spike-based ultra-low-power IR-UWB dynamic average threshold crossing scheme for muscle force wireless transmission (MSA, PMR, AB, MC, MM, DD, GM), pp. 1479–1484.
DATEDATE-2015-BalboniFB #configuration management #distributed #latency #multi #network #scalability
Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration (MB, JF, DB), pp. 806–811.
DATEDATE-2015-BortolottiMBRSB #monitoring #power management
An ultra-low power dual-mode ECG monitor for healthcare and wellness (DB, MM, AB, RR, GS, LB), pp. 1611–1616.
DATEDATE-2015-BringmannEGGMSS #generative #prototype #simulation
The next generation of virtual prototyping: ultra-fast yet accurate simulation of HW/SW systems (OB, WE, AG, AG, DMG, PS, SS), pp. 1698–1707.
DATEDATE-2015-GaillardonTSTOS #power management
A ultra-low-power FPGA based on monolithically integrated RRAMs (PEG, XT, JS, MT, SRO, DS, YL, GDM), pp. 1203–1208.
DATEDATE-2015-HanyuSOMNM #architecture #in memory #paradigm #power management #reliability #towards
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm (TH, DS, NO, SM, MN, AM), pp. 1006–1011.
DATEDATE-2015-MamaghanianV #design #power management
Ultra-low-power ECG front-end design based on compressed sensing (HM, PV), pp. 671–676.
ICALPICALP-v2-2015-BringmannFHRS #network
Ultra-Fast Load Balancing on Scale-Free Networks (KB, TF, MH, RR, TS), pp. 516–527.
DACDAC-2014-BraojosMJAARM #design #monitoring #power management #smarttech
Ultra-Low Power Design of Wearable Cardiac Monitoring Systems (RB, HM, ADJ, GA, DA, FJR, SM), p. 6.
DACDAC-2014-ClercqUHV #implementation #power management
Ultra Low-Power implementation of ECC on the ARM Cortex-M0+ (RdC, LU, AVH, IV), p. 6.
DATEDATE-2014-BortolottiBWRB #architecture #hybrid #manycore #memory management #power management #scalability
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors (DB, AB, CW, DR, LB), pp. 1–6.
DATEDATE-2014-MacrelliWRHPTR #design #energy
Design and fabrication of a 315 μΗ bondwire micro-transformer for ultra-low voltage energy harvesting (EM, NW, SR, MH, RPP, MT, AR), pp. 1–4.
DATEDATE-2014-PrenatPLGJDSPN #logic #power management
Magnetic memories: From DRAM replacement to ultra low power logic chips (GP, GdP, CL, OG, KJ, BD, RCS, ILP, JPN), p. 1.
DATEDATE-2014-PuEMG #logic #power management #scalability #synthesis
Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling (YP, JDE, MM, JPdG), pp. 1–2.
DATEDATE-2014-TrivediAM #power management
Ultra-low power electronics with Si/Ge tunnel FET (ART, MFA, SM), pp. 1–6.
DATEDATE-2014-YasinSE #manycore #polynomial
Unified, ultra compact, quadratic power proxies for multi-core processors (MY, AS, IAME), pp. 1–4.
CASECASE-2013-ZhangPJST #energy #interface #monitoring #scalability #using
A secure and scalable telemonitoring system using ultra-low-energy wireless sensor interface for long-term monitoring in life science applications (WZ, PP, EJ, RS, KT), pp. 617–622.
DACDAC-2013-LeeLL #3d
Power benefit study for ultra-high density transistor-level monolithic 3D ICs (YJL, DBL, SKL), p. 10.
DACDAC-2013-SharadFR #memory management #power management
Ultra low power associative computing with spin neurons and resistive crossbar memory (MS, DF, KR), p. 6.
DACDAC-2013-SunWL #design #memory management #power management
Cross-layer racetrack memory design for ultra high density and low power consumption (ZS, WW, HHL), p. 6.
DACDAC-2013-TrivediCM #case study #power management
Exploring tunnel-FET for ultra low power analog applications: a case study on operational transconductance amplifier (ART, SC, SM), p. 6.
DATEDATE-2013-AnanthanarayananGP #detection #fault #low cost #set #using
Low cost permanent fault detection using ultra-reduced instruction set co-processors (SA, SG, HDP), pp. 933–938.
DATEDATE-2013-BeigneVGTBTBMBMFNAPGCRCEW #design
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs (EB, AV, BG, OT, TB, YT, SB, GM, OB, YM, PF, JPN, FA, BPP, AG, SC, PR, JLC, SE, RW), pp. 613–618.
DATEDATE-2013-DoganBCABA #analysis #embedded #execution #multi #power management
Synchronizing code execution on ultra-low-power embedded multi-channel signal analysis platforms (AYD, RB, JC, GA, AB, DA), pp. 396–399.
DATEDATE-2013-GrimmMP #challenge #power management
Ultra-low power: an EDA challenge (CG, JM, XP), p. 483.
DATEDATE-2013-LotfianJ #architecture #hardware #power management #smarttech #using
An ultra-low power hardware accelerator architecture for wearable computers using dynamic time warping (RL, RJ), pp. 913–916.
DATEDATE-2013-PerelliCMBMB #design #health #monitoring #power management
Design of an ultra-low power device for aircraft structural health monitoring (AP, CC, LDM, DB, AM, LB), pp. 1127–1130.
CHICHI-2013-OneyHOW #named #using
ZoomBoard: a diminutive qwerty soft keyboard using iterative zooming for ultra-small devices (SO, CH, AO, JW), pp. 2799–2802.
ICSEICSE-2013-DyerNRN #framework #named #repository #scalability
Boa: a language and infrastructure for analyzing ultra-large-scale software repositories (RD, HAN, HR, TNN), pp. 422–431.
ICSEICSE-2013-Northrop #case study #matter #scalability #years after
Does scale really matter? ultra-large-scale systems seven years after the study (keynote) (LMN), p. 857.
DACDAC-2012-LeeKYBS #design #guidelines #power management
Circuit and system design guidelines for ultra-low power sensor nodes (YL, YK, DY, DB, DS), pp. 1037–1042.
DACDAC-2012-MorrisBZP #logic #named #using
mLogic: ultra-low voltage non-volatile logic circuits using STT-MTJ devices (DM, DB, JG(Z, LTP), pp. 486–491.
DACDAC-2012-RajendiranAPTG #reliability #set
Reliable computing with ultra-reduced instruction set co-processors (AR, SA, HDP, MVT, SG), pp. 697–702.
DACDAC-2012-Seok #design
Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits (MS), pp. 968–973.
DATEDATE-2012-BonamyPPC #configuration management #named #power management
UPaRC — Ultra-fast power-aware reconfiguration controller (RB, HMP, SP, DC), pp. 1373–1378.
DATEDATE-2012-DoganCRBA #architecture #design #health #manycore #monitoring #power management #smarttech
Multi-core architecture design for ultra-low-power wearable health monitoring systems (AYD, JC, MR, AB, DA), pp. 988–993.
DATEDATE-2012-MagnoMBPOB #network #power management
Smart power unit with ultra low power radio trigger capabilities for wireless sensor networks (MM, SJM, DB, EMP, BO, LB), pp. 75–80.
DATEDATE-2012-MakosiejTVA #design #embedded #optimisation #power management
Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization (AM, OT, AV, AA), pp. 93–98.
DATEDATE-2012-SharmaCAHCD #power management #variability
Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM (VS, SC, MA, JH, FC, WD), pp. 1042–1047.
CHICHI-2012-MarshallCAS #interactive #named
Ultra-tangibles: creating movable tangible objects on interactive tables (MTM, TC, JA, SS), pp. 2185–2188.
DACDAC-2011-SeokJCBS #design #energy #performance #pipes and filters
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design (MS, DJ, CC, DB, DS), pp. 990–995.
DATEDATE-2011-WeddellMA #power management
Ultra low-power photovoltaic MPPT technique for indoor and outdoor wireless sensor nodes (ASW, GVM, BMAH), pp. 905–908.
DATEDATE-2011-YehHWL #framework #simulation
Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method (YFY, CYH, CAW, HCL), pp. 353–358.
ICMLICML-2011-OrabonaL #algorithm #kernel #learning #multi #optimisation
Ultra-Fast Optimization Algorithm for Sparse Multi Kernel Learning (FO, JL), pp. 249–256.
HPCAHPCA-2011-MehraraHSM #javascript #parallel #using
Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism (MM, PCH, MS, SAM), pp. 87–98.
RTARTA-2011-NishidaSS #term rewriting
Soundness of Unravelings for Deterministic Conditional Term Rewriting Systems via Ultra-Properties Related to Linearity (NN, MS, TS), pp. 267–282.
DACDAC-2010-CabeQS #power management
Stacking SRAM banks for ultra low power standby mode operation (ACC, ZQ, MRS), pp. 699–704.
DACDAC-2010-DadgourHSB #analysis #design #energy #logic #using
Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS (HFD, MMH, CS, KB), pp. 893–896.
DACDAC-2010-FujitaYLCAW #power management
Detachable nano-carbon chip with ultra low power (SF, SY, DL, XC, DA, HSPW), pp. 631–632.
DACDAC-2010-HePKYALC #energy #named #throughput
Xetal-Pro: an ultra-low energy and high throughput SIMD processor (YH, YP, RPK, ZY, AAA, SML, HC), pp. 543–548.
DACDAC-2010-NsBNPSGB #design #future of #power management #question #what
What’s cool for the future of ultra low power designs? (NN, JB, KN, VP, TS, AG, SB), pp. 523–524.
DACDAC-2010-PashaDS #architecture #generative #power management
A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking (MAP, SD, OS), pp. 693–698.
DATEDATE-2010-KennedyWLL #string #throughput
Ultra-high throughput string matching for Deep Packet Inspection (AK, XW, ZL, BL), pp. 399–404.
DATEDATE-2010-LuPRR #energy #performance #transducer
Efficient power conversion for ultra low voltage micro scale energy transducers (CL, SPP, VR, KR), pp. 1602–1607.
DATEDATE-2010-TajalliL #design #framework #power management #using
Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits (AT, YL), pp. 711–716.
DATEDATE-2010-VenutoSCP #power management
Ultra low-power 12-bit SAR ADC for RFID applications (DDV, ES, DTC, YP), pp. 1071–1075.
DATEDATE-2009-BachmannGHBS #power management
A low-power ASIP for IEEE 802.15.4a ultra-wideband impulse radio baseband processing (CB, AG, JH, MB, CS), pp. 1614–1619.
VLDBVLDB-2009-WillhalmPBPZS #in memory #named #performance #using
SIMD-Scan: Ultra Fast in-Memory Table Scan using on-Chip Vector Processing Units (TW, NP, YB, HP, AZ, JS), pp. 385–394.
HCIHCI-AUII-2009-SchenkSDSFGL
Ultra Compact Laser Based Projectors and Imagers (HS, TS, CD, MS, KF, CG, HL), pp. 501–510.
DACDAC-2008-KulkarniKPR #array #process
Process variation tolerant SRAM array for ultra low voltage applications (JPK, KK, SPP, KR), pp. 108–113.
DATEDATE-2008-FrenkilCU #analysis #design #physics #power management
Power Gating for Ultra-low Leakage: Physics, Design, and Analysis (JF, KC, KU).
DATEDATE-2008-LewickiPTDJ #design #prototype
A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design (AL, JdPP, JT, ED, GJ), pp. 804–807.
DATEDATE-2008-NuzzoNSFP #design
Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications (PN, CN, SS, LF, GVdP), pp. 1390–1393.
ICPRICPR-2008-KauffmannP #automaton #gpu
Cellular automaton for ultra-fast watershed transform on GPU (CK, NP), pp. 1–4.
ICPRICPR-2008-NedzvedABMD #analysis #image
The structure analysis of ultra thin magnetic film images (AN, SA, AB, AM, WD), pp. 1–4.
SACSAC-2008-EinseleIH #independence #recognition #word
A language-independent, open-vocabulary system based on HMMs for recognition of ultra low resolution words (FE, RI, JH), pp. 429–433.
FATESTestCom-FATES-2008-Yasuda #development #network
All-IP Based Ultra 3G Network/Service Development in a Competitive Market (YY), pp. 1–4.
DACDAC-2007-DadgourB #analysis #design #hybrid #power management
Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications (HFD, KB), pp. 306–311.
DACDAC-2007-ZhuGSDK #architecture #power management #towards #using
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors (CZ, Z(G, LS, RPD, RGK), pp. 312–317.
DATEDATE-2007-BarajasCCMGCBI #behaviour #interactive #modelling #optimisation
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems (EB, RC, DC, DM, JLG, IC, SB, MI), pp. 1430–1435.
DATEDATE-2007-HwangCR #interactive #process #scalability
Interactive presentation: Process tolerant beta-ratio modulation for ultra-dynamic voltage scaling (MEH, TC, KR), pp. 1550–1555.
HCIHIMI-IIE-2007-SuzukiUKAI #adaptation #communication #interactive #towards
Toward Adaptive Interaction — The Effect of Ambient Sounds in an Ultra-Realistic Communication System (NS, IU, TK, HA, NI), pp. 185–194.
DATEDATE-2006-CarbognaniBFKF #power management
Two-phase resonant clocking for ultra-low-power hearing aid applications (FC, FB, NF, HK, WF), pp. 73–78.
DATEDATE-2006-ChakrapaniACKPS #architecture #embedded #probability
Ultra-efficient (embedded) SOC architectures based on probabilistic CMOS (PCMOS) technology (LNC, BESA, SC, PK, KVP, BS), pp. 1110–1115.
DATEDATE-2006-Chang #design #power management
An ultra low-power TLB design (YJC), pp. 1122–1127.
DATEDATE-2006-El-HoiydiACCDEGGLMPPPRRRV #power management
The ultra low-power wiseNET system (AEH, CA, RC, SC, JDD, CCE, FG, SG, EL, TM, VP, FXP, PDP, NR, AR, DR, PV), pp. 971–976.
DATEDATE-DF-2006-PapaefstathiouP #classification
A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments (VP, IP), pp. 112–117.
ASPLOSASPLOS-2006-ShyamCPBA #fault #low cost #pipes and filters
Ultra low-cost defect protection for microprocessor pipelines (SS, KC, SP, VB, TMA), pp. 73–82.
ASPLOSASPLOS-2004-EkanayakeKM #network #power management
An ultra low-power processor for sensor networks (VNE, CKI, RM), pp. 27–36.
ICSMEICSM-2001-BennettMGLBB #agile #architecture #evolution
An Architectural Model for Service-Based Software with Ultra Rapid Evolution (KHB, MM, NG, PJL, DB, PB), pp. 292–300.
PLDIPLDI-2001-HeintzeT01a #alias #analysis #c #using
Ultra-fast Aliasing Analysis using CLA: A Million Lines of C Code in a Second (NH, OT), pp. 254–263.
SIGMODSIGMOD-2000-BratsbergT #design #named #tutorial
Tutorial: Designing an Ultra Highly Available DBMS (SEB, ØT), p. 577.
VLDBVLDB-2000-HvasshovdBT
An Ultra Highly Available DBMS (SOH, SEB, ØT), p. 673.
EDOCEDOC-2000-SudaTHN #distributed #scalability
New Control Methods for the Realization of an Ultra-Large-Scale Cooperative Distributed System (SS, HT, AH, KN), pp. 13–20.
SIGIRSIGIR-1999-WitbrockM #approach #generative #named #statistics #summary
Ultra-Summarization: A Statistical Approach to Generating Highly Condensed Non-Extractive Summaries (poster abstract) (MJW, VOM), pp. 315–316.
DACDAC-1998-UsamiIIKTHATK #design #power management #scalability
Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques (KU, MI, TI, MK, MT, MH, HA, TT, TK), pp. 483–488.
DATEEDTC-1997-NarayananSKLB #fault
A fault diagnosis methodology for the UltraSPARCTM-I microprocessor (SN, RS, RPK, MEL, SBN), pp. 494–500.
PPDPALP-1996-Marchiori
Unravelings and Ultra-properties (MM), pp. 107–121.
DACDAC-1995-CaoABDDDDDDFGGGILMMMPPPRRSSSSVWYYZZ #design
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc (AC, AA, JB, PD, PD, PD, MD, TD, MD, PF, OG, DG, SG, JI, LL, JM, MM, SM, PP, AP, RP, SR, NR, PS, SS, RS, BS, WV, MW, PY, RKY, JZ, GBZ), pp. 19–22.
DACDAC-1995-GateleyBCCDDEFGGJKKMNNOPSSWW
UltraSPARC-I Emulation (JG, MB, DC, SC, PD, MD, ME, GF, TG, DG, RJ, MK, RK, MM, CN, SJNJ, TO, GP, CS, NS, JW, PW), pp. 13–18.
DACDAC-1995-TremblayMIK #analysis #architecture #flexibility #performance #trade-off
A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I (MT, GM, AI, LK), pp. 2–6.
DACDAC-1995-YangGMJL #design
System Design Methodology of UltraSPARC-I (LY, DG, JM, RJ, PL), pp. 7–12.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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