BibSLEIGH — Proceedings of the 49th Annual Design Automation Conference

Patrick Groeneveld, Donatella Sciuto, Soha Hassoun
Proceedings of the 49th Annual Design Automation Conference
DAC, 2012.

SYS

@proceedings{DAC-2012,
	acmid         = "2228360",
	address       = "San Francisco, California, USA",
	editor        = "Patrick Groeneveld and Donatella Sciuto and Soha Hassoun",
	isbn          = "978-1-4503-1199-1",
	publisher     = "{ACM}",
	title         = "{Proceedings of the 49th Annual Design Automation Conference}",
	year          = 2012,
}

Contents (196 items)

DAC-2012-Lauwereins #physics: Biomedical electronics serving as physical environmental and emotional watchdogs (RL), pp. 1–5.
DAC-2012-MicheliBBTC #personalisation: Integrated biosensors for personalized medicine (GDM, CB, CBR, IT, SC), pp. 6–11.
DAC-2012-BurlesonCRF #challenge #design: Design challenges for secure implantable medical devices (WB, SSC, BR, KF), pp. 12–17.
DAC-2012-LuoC #design: Design of pin-constrained general-purpose digital microfluidic biochips (YL, KC), pp. 18–25.
DAC-2012-GrissomB #scheduling: Path scheduling on digital microfluidic biochips (DG, PB), pp. 26–35.
DAC-2012-SasanianWM #quantum #using: Realizing reversible circuits using a new class of quantum gates (ZS, RW, DMM), pp. 36–41.
DAC-2012-BobbaMLM #physics #synthesis: Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors (SB, MDM, YL, GDM), pp. 42–47.
DAC-2012-TovinakereSD #clustering #estimation #logic: A semiempirical model for wakeup time estimation in power-gated logic clusters (VDT, OS, SD), pp. 48–55.
DAC-2012-GhasemiSSK #delivery #effectiveness #power management: Cost-effective power delivery to support per-core voltage domains for power-constrained processors (HRG, AAS, MJS, NSK), pp. 56–61.
DAC-2012-DonkohLS #adaptation #design #hybrid #predict #using: A hybrid and adaptive model for predicting register file and SRAM power using a reference design (ED, AL, ES), pp. 62–67.
DAC-2012-MirhoseiniPK #energy #memory management: Coding-based energy minimization for phase change memory (AM, MP, FK), pp. 68–76.
DAC-2012-AgostaBP #analysis: A code morphing methodology to automate power analysis countermeasures (GA, AB, GP), pp. 77–82.
DAC-2012-RajendranPSK #analysis #logic #obfuscation #security: Security analysis of logic obfuscation (JR, YP, OS, RK), pp. 83–89.
DAC-2012-WeiLKP #benchmark #hardware #metric: Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry (SW, KL, FK, MP), pp. 90–95.
DAC-2012-ForteS #on the #proximity: On improving the uniqueness of silicon-based physically unclonable functions via optical proximity correction (DF, AS), pp. 96–105.
DAC-2012-FangMZLHZCLZ #manycore #named: Transformer: a functional-driven cycle-accurate multicore simulator (ZF, QM, KZ, YL, YH, WZ, HC, JL, BZ), pp. 106–114.
DAC-2012-VincoCBF #architecture #gpu #named: SAGA: SystemC acceleration on GPU architectures (SV, DC, VB, FF), pp. 115–120.
DAC-2012-MurilloEJYLA #hybrid #simulation: Synchronization for hybrid MPSoC full-system simulation (LGM, JFE, JJ, SY, RL, GA), pp. 121–126.
DAC-2012-HuangLWT #interface: A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation (YHH, YSL, HIW, RST), pp. 127–132.
DAC-2012-KoushanfarFMBSSP #question: Can EDA combat the rise of electronic counterfeiting? (FK, SF, CM, WB, MS, PS, MP), pp. 133–138.
DAC-2012-VelamalaSSC #matter #physics #predict #statistics: Physics matters: statistical aging prediction under trapping/detrapping (JBV, KS, TS, YC), pp. 139–144.
DAC-2012-HuCG #synthesis: Library-aware resonant clock synthesis (LARCS) (XH, WJC, MRG), pp. 145–150.
DAC-2012-AbhishekN #grid #incremental #power management #verification: Incremental power grid verification (A, FNN), pp. 151–156.
DAC-2012-ZhaoSL #3d #analysis: Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs (XZ, MS, SKL), pp. 157–162.
DAC-2012-JungSB #off the shelf #using: Tracking appliance usage information in residential settings using off-the-shelf low-frequency meters (DJ, AS, AB), pp. 163–168.
DAC-2012-ZhangHY #implementation #realtime #recognition: Implementing an FPGA system for real-time intent recognition for prosthetic legs (XZ, HH, QY), pp. 169–175.
DAC-2012-WangKPRLFMP #adaptation #design #optimisation #statistics: Statistical design and optimization for adaptive post-silicon tuning of MEMS filters (FW, GK, AP, JR, XL, GKF, TM, LTP), pp. 176–181.
DAC-2012-ChajiJ #low cost: Generic low-cost characterization of Vth and mobility variations in LTPS TFTs for non-uniformity calibration of active-matrix OLED displays (GRC, JJ), pp. 182–187.
DAC-2012-HuangHRBK #detection #embedded #fault tolerance #towards: Towards fault-tolerant embedded systems with imperfect fault detection (JH, KH, AR, CB, AK), pp. 188–196.
DAC-2012-UkhovBEP #analysis #embedded #multi #optimisation #reliability: Steady-state dynamic temperature analysis and reliability optimization for embedded multiprocessor systems (IU, MB, PE, ZP), pp. 197–204.
DAC-2012-EberlGTA #automation #design #network: Considering diagnosis functionality during automatic system-level design of automotive networks (ME, MG, JT, UA), pp. 205–213.
DAC-2012-WangBDS #memory management #metadata #named #reliability: Meta-Cure: a reliability enhancement strategy for metadata in NAND flash memory storage systems (YW, LADB, NDD, ZS), pp. 214–219.
DAC-2012-KoushanfarSS #challenge: EDA for secure and dependable cybercars: challenges and opportunities (FK, ARS, HS), pp. 220–228.
DAC-2012-JimenezNI: Software controlled cell bit-density to improve NAND flash lifetime (XJ, DN, PI), pp. 229–234.
DAC-2012-WangW #algorithm #memory management #performance: Observational wear leveling: an efficient algorithm for flash memory management (CW, WFW), pp. 235–242.
DAC-2012-JogMXXNID #architecture #performance: Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs (AJ, AKM, CX, YX, VN, RI, CRD), pp. 243–252.
DAC-2012-WangDX #architecture: Point and discard: a hard-error-tolerant architecture for non-volatile last level caches (JW, XD, YX), pp. 253–258.
DAC-2012-HoffmannHKLMMNSSACD #self: Self-aware computing in the Angstrom processor (HH, JH, GK, EL, MM, JEM, SMN, MES, YS, AA, APC, SD), pp. 259–264.
DAC-2012-YouseffBKGWA #operating system: The case for elastic operating system services in fos (LY, NB, HK, CGI, DW, AA), pp. 265–270.
DAC-2012-AuerbachBBCFRS #compilation #runtime: A compiler and runtime for heterogeneous computing (JSA, DFB, IB, PC, SJF, RMR, SS), pp. 271–276.
DAC-2012-CampanoniJHWB #overview: The HELIX project: overview and directions (SC, TMJ, GHH, GYW, DMB), pp. 277–282.
DAC-2012-SinhaYCCC #design #modelling #predict: Exploring sub-20nm FinFET design with predictive technology models (SS, GY, VC, BC, YC), pp. 283–288.
DAC-2012-ZhangLWFW #higher-order #performance #reduction: Fast nonlinear model order reduction via associated transforms of high-order volterra transfer functions (YZ, HL, QW, NF, NW), pp. 289–294.
DAC-2012-SuYZ #named #order #performance #reduction: AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits (YS, FY, XZ), pp. 295–300.
DAC-2012-MeirR #analysis #biology #named #network #performance #using: BLAST: efficient computation of nonlinear delay sensitivities in electronic and biological networks using barycentric Lagrange enabled transient adjoint analysis (AM, JSR), pp. 301–310.
DAC-2012-AadithyaR #abstraction #automation #automaton #generative #logic #named: DAE2FSM: automatic generation of accurate discrete-time logical abstractions for continuous-time circuit dynamics (KVA, JSR), pp. 311–316.
DAC-2012-JungPL #3d #reliability: Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs (MJ, DZP, SKL), pp. 317–326.
DAC-2012-ChouHHH #design #model checking: Symbolic model checking on SystemC designs (CNC, YSH, CH, CY(H), pp. 327–333.
DAC-2012-UrdahlSWK #abstraction #composition #concurrent #verification: System verification of concurrent RTL modules by compositional path predicate abstraction (JU, DS, MW, WK), pp. 334–343.
DAC-2012-HaoRX #behaviour #equivalence #pipes and filters: Equivalence checking for behaviorally synthesized pipelines (KH, SR, FX), pp. 344–349.
DAC-2012-PurandareAH #correctness #proving #regular expression: Proving correctness of regular expression accelerators (MP, KA, CH), pp. 350–355.
DAC-2012-Seshia #deduction #induction #named #synthesis #verification: Sciduction: combining induction, deduction, and structure for verification and synthesis (SAS), pp. 356–365.
DAC-2012-ForoutanSP #3d #interface #low cost #using: Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces (SF, AS, FP), pp. 366–375.
DAC-2012-HuangCTCK #design #generative #named #novel: Attackboard: a novel dependency-aware traffic generator for exploring NoC design space (YSCH, YCC, TCT, YYC, CTK), pp. 376–381.
DAC-2012-BhardwajCR #adaptation #algorithm #towards: Towards graceful aging degradation in NoCs through an adaptive routing algorithm (KB, KC, SR), pp. 382–391.
DAC-2012-KahngLN #estimation #modelling: Explicit modeling of control and data for improved NoC router estimation (ABK, BL, SN), pp. 392–397.
DAC-2012-ParkKCDCP #prototype: Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI (SP, TK, CHOC, BKD, AC, LSP), pp. 398–405.
DAC-2012-SatpathyDDMSB #multi #quality #self: High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service (SS, RD, RGD, TNM, DS, DB), pp. 406–411.
DAC-2012-DingLM: WCET-centric partial instruction cache locking (HD, YL, TM), pp. 412–420.
DAC-2012-LoS #analysis #execution #monitoring #parallel #runtime #worst-case: Worst-case execution time analysis for parallel run-time monitoring (DL, GES), pp. 421–429.
DAC-2012-HuangCBK #consistency #embedded #realtime #runtime: Conforming the runtime inputs for hard real-time embedded systems (KH, GC, CB, AK), pp. 430–436.
DAC-2012-El-ShambakeyR #bound #concurrent #embedded #realtime: STM concurrency control for embedded real-time software with tighter time bounds (MES, BR), pp. 437–446.
DAC-2012-BathenD #distributed #hybrid #named: HaVOC: a hybrid memory-aware virtualization layer for on-chip distributed ScratchPad and non-volatile memories (LADB, ND), pp. 447–452.
DAC-2012-ChenHKYW #low cost: Age-based PCM wear leveling with nearly zero search cost (CHC, PCH, TWK, CLY, CYMW), pp. 453–458.
DAC-2012-Gester0NPSV #algorithm #data type #performance: Algorithms and data structures for fast and good VLSI routing (MG, DM, TN, CP, CS, JV), pp. 459–464.
DAC-2012-LiANSVZ #design #physics #predict: Guiding a physical design closure system to produce easier-to-route designs with more predictable timing (ZL, CJA, GJN, CCNS, NV, NYZ), pp. 465–470.
DAC-2012-Suto #design #using: Rule agnostic routing by using design fabrics (GS), pp. 471–475.
DAC-2012-DinglerKNHCNPBLS #logic: Making non-volatile nanomagnet logic non-volatile (AD, SK, MTN, XSH, GC, JN, WP, GHB, PL, VKS), pp. 476–485.
DAC-2012-MorrisBZP #logic #named #using: mLogic: ultra-low voltage non-volatile logic circuits using STT-MTJ devices (DM, DB, JG(Z, LTP), pp. 486–491.
DAC-2012-ParkGMRR #architecture #design #energy #performance #using: Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture (SPP, SKG, NNM, AR, KR), pp. 492–497.
DAC-2012-HuLWR #array #hardware #using: Hardware realization of BSB recall function using memristor crossbar arrays (MH, HL, QW, GSR), pp. 498–503.
DAC-2012-HuangLR #energy #hardware #trade-off #using: A methodology for energy-quality tradeoff using imprecise hardware (JH, JL, GR), pp. 504–509.
DAC-2012-KarakonstantisRBB #fault #on the: On the exploitation of the inherent error resilience of wireless systems under unreliable silicon (GK, CR, CB, AB), pp. 510–515.
DAC-2012-LinWYSCP #configuration management: Near-optimal, dynamic module reconfiguration in a photovoltaic system to combat partial shading effects (XL, YW, SY, DS, NC, MP), pp. 516–521.
DAC-2012-KimPCXWP #architecture #energy #hybrid: Networked architecture for hybrid electrical energy storage systems (YK, SP, NC, QX, YW, MP), pp. 522–528.
DAC-2012-SunGR #design #nondeterminism #robust: A new uncertainty budgeting based method for robust analog/mixed-signal design (JS, PG, JMWR), pp. 529–535.
DAC-2012-JungCK #optimisation #variability: Variability-aware, discrete optimization for analog circuits (SJ, YC, JK), pp. 536–541.
DAC-2012-LiuARVG #component #multi #performance #synthesis: Efficient multi-objective synthesis for microwave components based on computational intelligence techniques (BL, HA, SR, GAEV, GGEG), pp. 542–548.
DAC-2012-OuCC #constraints #multi: Non-uniform multilevel analog routing with matching constraints (HCO, HCCC, YWC), pp. 549–554.
DAC-2012-YuanLX #configuration management #debugging #named: X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug (FY, XL, QX), pp. 555–560.
DAC-2012-LinHFHM #debugging #detection #effectiveness #validation: Quick detection of difficult bugs for effective post-silicon validation (DL, TH, FF, NH, SM), pp. 561–566.
DAC-2012-WangPYLKB #optimisation #testing: Test-data volume optimization for diagnosis (HW, OP, XY, SL, IK, RDB), pp. 567–572.
DAC-2012-GuoK #concurrent #detection #encryption #fault #standard: Invariance-based concurrent error detection for advanced encryption standard (XG, RK), pp. 573–578.
DAC-2012-Al-MaashriDCCXNC #algorithm #recognition: Accelerating neuromorphic vision algorithms for recognition (AAM, MD, MC, NC, YX, VN, CC), pp. 579–584.
DAC-2012-PinoLCHL #case study #modelling #statistics: Statistical memristor modeling and case study in neuromorphic computing (REP, HHL, YC, MH, BL), pp. 585–590.
DAC-2012-0002ZW #comparison: Triple patterning aware routing and its comparison with double patterning aware routing in 14nm technology (QM, HZ, MDFW), pp. 591–596.
DAC-2012-ZhangC #named: GDRouter: interleaved global routing and detailed routing for ultimate routability (YZ, CC), pp. 597–602.
DAC-2012-RyzhenkoB #satisfiability #standard: Standard cell routing via boolean satisfiability (NR, SB), pp. 603–612.
DAC-2012-LiuCL #algorithm #multi #performance: An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction (CHL, ICC, DTL), pp. 613–622.
DAC-2012-ShachamGSWBVHDQR #design #game studies: Avoiding game over: bringing design to the next level (OS, SG, SS, MW, JB, AV, MH, AD, WQ, SR), pp. 623–629.
DAC-2012-PaekMSSK #markov #named #random: PowerField: a transient temperature-to-power technique based on Markov random field theory (SP, SHM, WS, JS, LSK), pp. 630–635.
DAC-2012-RanieriVCAV #algorithm #manycore #named: EigenMaps: algorithms for optimal thermal maps extraction and sensor placement on multicore processors (JR, AV, AC, DA, MV), pp. 636–641.
DAC-2012-ZhouLCKQY #framework #monitoring: An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring (HZ, XL, CYC, EK, HQ, SCY), pp. 642–647.
DAC-2012-MengKC #3d #constraints #energy #manycore #optimisation #performance: Optimizing energy efficiency of 3-D multicore systems with stacked DRAM under power and thermal constraints (JM, KK, AKC), pp. 648–655.
DAC-2012-GhosalLRTPWTA #analysis #data access #data flow #semantics: Static dataflow with access patterns: semantics and analysis (AG, RL, KR, ST, AP, GW, TNT, HAA), pp. 656–663.
DAC-2012-ChoiOKH #architecture #data flow #graph #manycore: Executing synchronous dataflow graphs on a SPM-based multicore architecture (JC, HO, SK, SH), pp. 664–671.
DAC-2012-LearyCC #architecture #memory management #synthesis: System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC (GL, WC, KSC), pp. 672–677.
DAC-2012-SharifiSKI #capacity: Courteous cache sharing: being nice to others in capacity management (AS, SS, MTK, MJI), pp. 678–687.
DAC-2012-KumarGCALT #approach #cyber-physical #hybrid #verification: A hybrid approach to cyber-physical systems verification (PK, DG, SC, AA, KL, LT), pp. 688–696.
DAC-2012-RajendiranAPTG #reliability #set: Reliable computing with ultra-reduced instruction set co-processors (AR, SA, HDP, MVT, SG), pp. 697–702.
DAC-2012-ZhangTT #identification #using: Identification of recovered ICs using fingerprints from a light-weight on-chip sensor (XZ, NT, MT), pp. 703–708.
DAC-2012-ShojaeiDR #integer #programming: Confidentiality preserving integer programming for global routing (HS, AD, PR), pp. 709–716.
DAC-2012-Scheffer #design #tool support: Design tools for artificial nervous systems (LS), pp. 717–722.
DAC-2012-LiuH #network #scalability #simulation: Dynamic river network simulation at large scale (FL, BRH), pp. 723–728.
DAC-2012-Bertacco: Humans for EDA and EDA for humans (VB), pp. 729–733.
DAC-2012-LinK #comprehension #logic #search-based #synthesis: Application of logic synthesis to the understanding and cure of genetic diseases (PCKL, SPK), pp. 734–740.
DAC-2012-AthikulwongsePL #3d: Exploiting die-to-die thermal coupling in 3D IC placement (KA, MP, SKL), pp. 741–746.
DAC-2012-LiuH12a #named #optimisation: ComPLx: A Competitive Primal-dual Lagrange Optimization for Global Placement (MCK, ILM), pp. 747–752.
DAC-2012-WardDP #automation #evaluation #learning #named: PADE: a high-performance placer with automatic datapath extraction and evaluation through high dimensional data learning (SIW, DD, DZP), pp. 756–761.
DAC-2012-ChouHC #design: Structure-aware placement for datapath-intensive circuit designs (SC, MKH, YWC), pp. 762–767.
DAC-2012-WeiSVLARHTKS #evaluation #named: GLARE: global and local wiring aware routability evaluation (YW, CCNS, NV, ZL, CJA, LNR, ADH, GET, DK, SSS), pp. 768–773.
DAC-2012-ViswanathanASLW #benchmark #contest #metric: The DAC 2012 routability-driven placement contest and benchmark suite (NV, CJA, CCNS, ZL, YW), pp. 774–782.
DAC-2012-KelleyWSRH #interface: Removing overhead from high-level interfaces (KK, MW, JPS, SR, MH), pp. 783–789.
DAC-2012-YorkC #multi #on the: On the asymptotic costs of multiplexer-based reconfigurability (JY, DC), pp. 790–795.
DAC-2012-VenkataramaniSKRR #approximate #logic #named #synthesis: SALSA: systematic logic synthesis of approximate circuits (SV, AS, VJK, KR, AR), pp. 796–801.
DAC-2012-ChangJC #configuration management #optimisation #using: Timing ECO optimization using metal-configurable gate-array spare cells (HYC, IHRJ, YWC), pp. 802–807.
DAC-2012-KumarBKV #analysis #predict #source code #using: Early prediction of NBTI effects using RTL source code analysis (JAK, KMB, HK, SV), pp. 808–813.
DAC-2012-WelpKK #optimisation: Generalized SAT-sweeping for post-mapping optimization (TW, SK, AK), pp. 814–819.
DAC-2012-KahngK #approximate #configuration management #design: Accuracy-configurable adder for approximate arithmetic designs (ABK, SK), pp. 820–825.
DAC-2012-KozhikkottuDR #design: Recovery-based design for variation-tolerant SoCs (VJK, SD, AR), pp. 826–833.
DAC-2012-ZhaoJDZKI #design #hybrid #multi #optimisation: A hybrid NoC design for cache coherence optimization for chip multiprocessors (HZ, OJ, WD, YZ, MTK, MJI), pp. 834–842.
DAC-2012-CongGGGR #architecture: Architecture support for accelerator-rich CMPs (JC, MAG, MG, BG, GR), pp. 843–849.
DAC-2012-JeongESP #cpu #gpu #memory management: A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC (MKJ, ME, CS, NCP), pp. 850–855.
DAC-2012-SironiBCCHSS #adaptation #named #operating system #performance #self: Metronome: operating system level performance management via self-adaptive computing (FS, DBB, SC, FC, HH, DS, MDS), pp. 856–865.
DAC-2012-ShafiqueZWBH #adaptation #memory management #multi #power management #video: Adaptive power management of on-chip video memory for multiview video coding (MS, BZ, FLW, SB, JH), pp. 866–875.
DAC-2012-ZhangWCHL #fine-grained #multi #performance: Heterogeneous multi-channel: fine-grained DRAM control for both system performance and power efficiency (GZ, HW, XC, SH, PL), pp. 876–881.
DAC-2012-HuangCK #memory management #ram: Joint management of RAM and flash memory with access pattern considerations (PCH, YHC, TWK), pp. 882–887.
DAC-2012-KimLCKWYL #cpu #gpu #hybrid #in memory #memory management: Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU (DK, SL, JC, DK, DHW, SY, SL), pp. 888–896.
DAC-2012-KimYL #latency #performance #ram: Write performance improvement by hiding R drift latency in phase-change RAM (YK, SY, SL), pp. 897–906.
DAC-2012-JiangZZY #embedded #multi #performance #scalability: Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors (LJ, BZ, YZ, JY), pp. 907–912.
DAC-2012-KirschP #problem: Incorrect systems: it’s not the problem, it’s the solution (CMK, HP), pp. 913–917.
DAC-2012-SloanSK #design #on the #probability: On software design for stochastic processors (JS, JS, RK), pp. 918–923.
DAC-2012-PalemA #exclamation #what: What to do about the end of Moore’s law, probably! (KVP, LA), pp. 924–929.
DAC-2012-Rinard #reasoning: Obtaining and reasoning about good enough software (MCR), pp. 930–935.
DAC-2012-ChangB #simulation: Improving gate-level simulation accuracy when unknowns exist (KHC, CB), pp. 936–940.
DAC-2012-MalburgFF #automation #design #hardware #locality #metric #using: Automated feature localization for hardware designs using coverage metrics (JM, AF, GF), pp. 941–946.
DAC-2012-KengV #abstraction #debugging #design #refinement #satisfiability: Path directed abstraction and refinement in SAT-based design debugging (BK, AGV), pp. 947–954.
DAC-2012-ChatterjeeKMZB #architecture #platform: Checking architectural outputs instruction-by-instruction on acceleration platforms (DC, AK, RM, AZ, VB), pp. 955–961.
DAC-2012-LiuAHG #standard: Standard cell sizing for subthreshold operation (BL, MA, JH, JPdG), pp. 962–967.
DAC-2012-Seok #design: Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits (MS), pp. 968–973.
DAC-2012-CropPC #detection #logic #throughput #using: Regaining throughput using completion detection for error-resilient, near-threshold logic (JC, RP, PC), pp. 974–979.
DAC-2012-SeoDWPCMBM #architecture #process: Process variation in near-threshold wide SIMD architectures (SS, RGD, MW, YP, CC, SAM, DB, TNM), pp. 980–987.
DAC-2012-0001AG #memory management #realtime #runtime: Run-time power-down strategies for real-time SDRAM memory controllers (KC, BA, KG), pp. 988–993.
DAC-2012-LionelPSE #monitoring #statistics #testing: Embedding statistical tests for on-chip dynamic voltage and temperature monitoring (LV, PM, SL, EB), pp. 994–999.
DAC-2012-ChenZCZX #mobile #scalability #streaming #video: Quality-retaining OLED dynamic voltage scaling for video streaming applications on mobile devices (XC, JZ, YC, MZ, CJX), pp. 1000–1005.
DAC-2012-KuangBK #manycore #network #optimisation: Traffic-aware power optimization for network applications on multicore servers (JK, LNB, RK), pp. 1006–1011.
DAC-2012-HuangYCL #case study #industrial: Alternate hammering test for application-specific DRAMs and an industrial case study (RFH, HYY, MCTC, SCL), pp. 1012–1017.
DAC-2012-AhmadyanKV #generative: Goal-oriented stimulus generation for analog circuits (SNA, JAK, SV), pp. 1018–1023.
DAC-2012-YeC #3d #fault: TSV open defects in 3D integrated circuits: characterization, test, and optimal spare allocation (FY, KC), pp. 1024–1030.
DAC-2012-HuangLTCSCK #3d #testing: Small delay testing for TSVs in 3-D ICs (SYH, YHL, KHT, WTC, SKS, YFC, DMK), pp. 1031–1036.
DAC-2012-LeeKYBS #design #guidelines #power management: Circuit and system design guidelines for ultra-low power sensor nodes (YL, YK, DY, DB, DS), pp. 1037–1042.
DAC-2012-BerettaRKGRA #design #energy #network #trade-off: Design exploration of energy-performance trade-offs for wireless sensor networks (IB, FJR, NK, PRG, VR, DA), pp. 1043–1048.
DAC-2012-ChristmannBCWP #energy #power management: Energy harvesting and power management for autonomous sensor nodes (JFC, EB, CC, JW, CP), pp. 1049–1054.
DAC-2012-ChungJ #analysis #functional #performance: Functional timing analysis made fast and general (YTC, JHRJ), pp. 1055–1060.
DAC-2012-ZolotovSHFVXLV #analysis #statistics: Timing analysis with nonseparable statistical and deterministic variations (VZ, DS, JGH, EAF, CV, JX, JL, NV), pp. 1061–1066.
DAC-2012-SinhaVVXZ #concept #statistics: Reversible statistical max/min operation: concept and applications to timing (DS, CV, NV, JX, VZ), pp. 1067–1073.
DAC-2012-RoyC #analysis #predict: Predicting timing violations through instruction-level path sensitization analysis (SR, KC), pp. 1074–1081.
DAC-2012-LeeC #co-evolution #design: A chip-package-board co-design methodology (HCL, YWC), pp. 1082–1087.
DAC-2012-LeeLHCCLS #design: Obstacle-avoiding free-assignment routing for flip-chip designs (PWL, HCL, YKH, YWC, CFC, IJL, CFS), pp. 1088–1093.
DAC-2012-ChenH #3d #synthesis: Clock tree synthesis with methodology of re-use in 3D IC (FWC, TH), pp. 1094–1099.
DAC-2012-QiuM #question #scalability: Can pin access limit the footprint scaling? (XQ, MMS), pp. 1100–1106.
DAC-2012-KanjJLHN #estimation #multi: Yield estimation via multi-cones (RK, RVJ, ZL, JH, SRN), pp. 1107–1112.
DAC-2012-KuoHCKC #design #monte carlo #performance: Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits (CCK, WYH, YHC, JFK, YKC), pp. 1113–1118.
DAC-2012-ZhaoF #on the fly #performance #simulation #towards: Towards efficient SPICE-accurate nonlinear circuit simulation with on-the-fly support-circuit preconditioners (XZ, ZF), pp. 1119–1124.
DAC-2012-RenCWZY #gpu #parallel #simulation: Sparse LU factorization for parallel circuit simulation on GPU (LR, XC, YW, CZ, HY), pp. 1125–1130.
DAC-2012-Taylor: Is dark silicon useful?: harnessing the four horsemen of the coming dark silicon apocalypse (MBT), pp. 1131–1136.
DAC-2012-MelpignanoBFJLHCD #embedded #evaluation #framework #manycore #performance #platform #visual notation: Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications (DM, LB, EF, BJ, TL, GH, FC, DD), pp. 1137–1142.
DAC-2012-Jeff #architecture #migration #multi: Big.LITTLE system architecture from ARM: saving power through heterogeneous multiprocessing and task context migration (BJ), pp. 1143–1146.
DAC-2012-PinckneySDFMSB #performance: Assessing the performance limits of parallelized near-threshold computing (NRP, KS, RGD, DF, TNM, DS, DB), pp. 1147–1152.
DAC-2012-KaulAHAKB #challenge #design: Near-threshold voltage (NTV) design: opportunities and challenges (HK, MA, SH, AA, RK, SB), pp. 1153–1158.
DAC-2012-ChangH #power management: Near-threshold operation for power-efficient computing?: it depends.. (LC, WH), pp. 1159–1163.
DAC-2012-SeversonYD #performance #question #reduction: Not so fast my friend: is near-threshold computing the answer for power reduction of wireless devices? (MS, KY, YD), pp. 1164–1166.
DAC-2012-YuCSJC #design #detection #using: Accurate process-hotspot detection using critical design rule extraction (YTY, YCC, SS, IHRJ, CC), pp. 1167–1172.
DAC-2012-GuoYSCZ #classification #distance #metric: Improved tangent space based distance metric for accurate lithographic hotspot classification (JG, FY, SS, CC, XZ), pp. 1173–1178.
DAC-2012-FangC: Simultaneous flare level and flare variation minimization with dummification in EUVL (SYF, YWC), pp. 1179–1184.
DAC-2012-FangCC #algorithm #composition #layout #novel: A novel layout decomposition algorithm for triple patterning lithography (SYF, YWC, WYC), pp. 1185–1190.
DAC-2012-WenZCWX #analysis #named #performance #reliability #scalability #statistics: PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method (WW, YZ, YC, YW, YX), pp. 1191–1196.
DAC-2012-KongC #3d #process: Exploiting narrow-width values for process variation-tolerant 3-D microprocessors (JK, SWC), pp. 1197–1206.
DAC-2012-MiddendorfBH #hardware #recursion #synthesis: Hardware synthesis of recursive functions through partial stream rewriting (LM, CB, CH), pp. 1207–1215.
DAC-2012-BachrachVRLWAWA #embedded #hardware #named #scala: Chisel: constructing hardware in a Scala embedded language (JB, HV, BR, YL, AW, RA, JW, KA), pp. 1216–1225.
DAC-2012-ChanSSM #hardware #specification #synthesis: Specification and synthesis of hardware checkpointing and rollback mechanisms (CC, DSN, DS, SM), pp. 1226–1232.
DAC-2012-CongZZ #memory management #optimisation #synthesis: Optimizing memory hierarchy allocation with loop transformations for high-level synthesis (JC, PZ, YZ), pp. 1233–1238.
DAC-2012-CongL #architecture #metric #optimisation #synthesis: A metric for layout-friendly microarchitecture optimization in high-level synthesis (JC, BL), pp. 1239–1244.
DAC-2012-ZuluagaMP #generative #network #sorting #streaming: Computer generation of streaming sorting networks (MZ, PAM, MP), pp. 1245–1253.
DAC-2012-LiSJ #crowdsourcing #named #towards #verification: CrowdMine: towards crowdsourced human-assisted verification (WL, SAS, SJ), pp. 1254–1255.
DAC-2012-Harris #design #natural language #specification: Extracting design information from natural language specifications (IGH), pp. 1256–1257.
DAC-2012-RoaCJ #logic: Material implication in CMOS: a new kind of logic (ER, WHC, BJ), pp. 1258–1259.
DAC-2012-LinMK #logic #satisfiability #using: Boolean satisfiability using noise based logic (PCKL, AM, SPK), pp. 1260–1261.
DAC-2012-SharadAPR #network: Cognitive computing with spin-based neural networks (MS, CA, GP, KR), pp. 1262–1263.
DAC-2012-JoubertDBTH #3d #exclamation #problem: Capacitance of TSVs in 3-D stacked chips a problem?: not for neuromorphic systems! (AJ, MD, BB, OT, RH), pp. 1264–1265.
DAC-2012-CastrillonTLA: Communication-aware mapping of KPN applications onto heterogeneous MPSoCs (JC, AT, RL, GA), pp. 1266–1271.
DAC-2012-CheC #embedded #manycore: Unrolling and retiming of stream applications onto embedded multicore processors (WC, KSC), pp. 1272–1277.
DAC-2012-DonohooOPA #embedded #energy #mobile: Exploiting spatiotemporal and device contexts for energy-efficient mobile embedded systems (BKD, CO, SP, CA), pp. 1278–1283.
DAC-2012-HamzehSV #morphism #named #using: EPIMap: using epimorphism to map applications on CGRAs (MH, AS, SBKV), pp. 1284–1291.
DAC-2012-RehmanSH #compilation #scheduling: Instruction scheduling for reliability-aware compilation (SR, MS, JH), pp. 1292–1300.
DAC-2012-SartoriK #compilation #energy #performance: Compiling for energy efficiency on timing speculative processors (JS, RK), pp. 1301–1308.

Patrick Groeneveld, Donatella Sciuto, Soha HassounProceedings of the 49th Annual Design Automation ConferenceDAC, 2012.

Contents (196 items)

Patrick Groeneveld, Donatella Sciuto, Soha Hassoun
Proceedings of the 49th Annual Design Automation Conference
DAC, 2012.