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Travelled to:
1 × USA
Collaborated with:
K.A.Chen K.H.Khokhani N.Nan S.Schmidt
Talks about:
procedur (1) problem (1) automat (1) layout (1) wire (1) chip (1)

Person: Michael Feuer

DBLP DBLP: Feuer:Michael

Contributed to:

DAC 19771977

Wrote 1 papers:

DAC-1977-ChenFKNS #automation #layout #problem
The chip layout problem: An automatic wiring procedure (KAC, MF, KHK, NN, SS), pp. 298–302.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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