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Travelled to:
1 × France
Collaborated with:
D.Pagano M.Rabozzi R.Cattaneo D.Sciuto M.D.Santambrogio
Talks about:
reconfigur (1) floorplan (1) thermal (1) partial (1) system (1) fpga (1) base (1) awar (1)

Person: Mikel Vuka

DBLP DBLP: Vuka:Mikel

Contributed to:

DATE 20152015

Wrote 1 papers:

DATE-2015-PaganoVRCSS #configuration management
Thermal-aware floorplanning for partially-reconfigurable FPGA-based systems (DP, MV, MR, RC, DS, MDS), pp. 920–923.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.