Travelled to:
1 × France
2 × USA
Collaborated with:
S.J.Davidmann F.Schirrmeister P.Moorby G.Musgrave D.Sciuto G.Martin W.Rosenstiel S.Swan F.Ghenassia J.Srouji
Talks about:
system (3) where (2) strength (1) verilog (1) algebra (1) explor (1) design (1) simul (1) mpsoc (1) logic (1)
Person: Peter Flake
DBLP: Flake:Peter
Contributed to:
Wrote 3 papers:
- DAC-2006-FlakeDS #design #tool support
- System-level exploration tools for MPSoC designs (PF, SJD, FS), pp. 286–287.
- DATE-v1-2004-SciutoMRSGFS #question
- SystemC and SystemVerilog: Where do They Fit? Where are They Going? (DS, GM, WR, SS, FG, PF, JS), pp. 122–129.
- DAC-1983-FlakeMM #algebra #logic #simulation
- An algebra for logic strength simulation (PF, PM, GM), pp. 615–618.