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Travelled to:
1 × Taiwan
Collaborated with:
C.Yugma J.Blue S.Dauzère-Pérès
Talks about:
semiconductor (1) manufactur (1) schedul (1) process (1) outlook (1) control (1) review (1) integr (1) advanc (1)

Person: Philippe Vialletelle

DBLP DBLP: Vialletelle:Philippe

Contributed to:

CASE 20142014

Wrote 1 papers:

CASE-2014-YugmaBDV #bibliography #integration #process #scheduling
Integration of scheduling and advanced process control in semiconductor manufacturing: review and outlook (CY, JB, SDP, PV), pp. 93–98.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.