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Collaborated with:
J.P.Hayes
Talks about:
function (1) layout (1) optim (1) cmos (1) cell (1)

Person: R. L. Maiasz

DBLP DBLP: Maiasz:R=_L=

Contributed to:

DAC 19871987

Wrote 1 papers:

DAC-1987-MaiaszH #functional #layout #optimisation
Layout Optimization of CMOS Functional Cells (RLM, JPH), pp. 544–551.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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