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Travelled to:
2 × USA
Collaborated with:
H.M.Jacobson A.Buyuktosunoglu P.Bose E.Acar Z.Hu V.V.Zyuban L.Eisen J.Griswell D.Logan B.Sinharoy J.M.Tendler
Talks about:
microarchitectur (1) processor (1) abstract (1) stretch (1) server (1) effici (1) stage (1) scale (1) power (1) model (1)

Person: Richard J. Eickemeyer

DBLP DBLP: Eickemeyer:Richard_J=

Contributed to:

HPCA 20112011
HPCA 20052005

Wrote 2 papers:

HPCA-2011-JacobsonBBAE #abstraction #architecture #modelling #scalability
Abstraction and microarchitecture scaling in early-stage power modeling (HMJ, AB, PB, EA, RJE), pp. 394–405.
HPCA-2005-JacobsonBHBZEEGLST #performance
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors (HMJ, PB, ZH, AB, VVZ, RJE, LE, JG, DL, BS, JMT), pp. 238–242.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.