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Travelled to:
1 × USA
Collaborated with:
C.H.Gebotys S.Wiratunga
Talks about:
architectur (1) processor (1) power (1) minim (1) deriv (1) vliw (1) usag (1)

Person: Robert J. Gebotys

DBLP DBLP: Gebotys:Robert_J=

Contributed to:

DAC 20002000

Wrote 1 papers:

DAC-2000-GebotysGW #architecture #power management
Power minimization derived from architectural-usage of VLIW processors (CHG, RJG, SW), pp. 308–311.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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