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Travelled to:
1 × Canada
1 × France
Collaborated with:
B.Li Y.Shen U.Schlichtmann J.Hu C.Weidenbach D.Dimova A.Fietzke M.Suda P.Wischnewski
Talks about:
version (1) circuit (1) integr (1) verif (1) spass (1) adapt (1) time (1)

Person: Rohit Kumar

DBLP DBLP: Kumar:Rohit

Contributed to:

DATE 20152015
CADE 20092009

Wrote 2 papers:

DATE-2015-KumarLSSH #adaptation #verification
Timing verification for adaptive integrated circuits (RK, BL, YS, US, JH), pp. 1587–1590.
CADE-2009-WeidenbachDFKSW
SPASS Version 3.5 (CW, DD, AF, RK, MS, PW), pp. 140–145.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.