Travelled to:2 × France
Collaborated with:J.M.Daga J.M.Portal D.Auvergne M.Robert P.Gorria J.Mitéran
Talks about:classifi (1) geometr (1) invert (1) intern (1) design (1) power (1) model (1) minim (1) time (1) real (1)
Person: S. Turgis
DBLP: Turgis:S=
Contributed to:
19971994Wrote 2 papers:
- EDTC-1997-TurgisDPA #modelling
- Internal power modelling and minimization in CMOS inverters (ST, JMD, JMP, DA), pp. 603–608.
- EDAC-1994-RobertGMT #classification #design #geometry #realtime
- Design of a Real Time Geometric Classifier (MR, PG, JM, ST), p. 656.